A Method for Detection of Multi-Bit Flip in Memory Based on Word Line Segmentation

Abstract

The invention discloses a detecting method of memory multi-bit upset based on word line segmentation. The method comprises the following steps that: a particle flow speed and a testing time are selected; an FPGA (Field Programmable Gate Array) board injects testing excitation into a memory; and the memory sends back data obtained by feedback to a PC (personnel computer) through a serial port to obtain the multi-bit upset position in the memory. By adopting the detecting method disclosed by the invention, the address and bit position of upset occurring each time can be clearly obtained through the data sent back by the testing board.

Description

technical field [0001] The invention relates to a method for detecting multi-bit inversion of memory based on word line division, and mainly relates to this type of memory without word line division. That is, there is only row decoding, no column decoding, and a row is a word. Background technique [0002] Various high-energy particles from cosmic rays and trace radioactive elements contained in packaging materials may cause bit flips in the memory, especially when the energy is strong, multi-bit flips may occur. Therefore, it is necessary to perform multi-bit flip detection on the designed memory to find design defects and bottlenecks. [0003] At present, since no detection method for multi-bit flips has been developed, most researchers only focus on single-bit flips, and judge whether a single-bit has occurred by reading back data from the SRAM. If the single-bit error detection method is simply used to detect multi-bit errors, it will consume a lot of time and put forw...

AI Technical Summary

Problems solved by technology

If the single-bit error detection method is simply used to detect multi-bit errors, it will consume a lot of time and put forward higher requirements for experimental instruments

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