A system for synchronous and real-time processing of video data using single-chip sram

Abstract

The invention provides a real-time processing system for achieving video data synchronization using a single-chip SRAM. The system comprises a data module, a data delay module, a first clock conversion module, a data access module and a second clock conversion module, wherein the data module is simultaneously connected with the data delay module and the first clock conversion module, and the first clock conversion module, the data access module and the second clock conversion module are connected in sequence. The real-time processing system can save off-chip resources on FPGA, and achieve real-time processing of the video.

Description

technical field [0001] The invention belongs to the technical field of image processing, and in particular relates to a system for realizing synchronous and real-time processing of video data by using a single-chip SRAM. Background technique [0002] In the target search and tracking system, the target video is collected by the CCD, image processing is performed on the video, and the target is extracted. Image processing is the most important part of the entire tracking system. Whether the video image can be processed in real time and efficiently is the key to the practicality of the entire tracking system. In recent years, there are more and more researches on the target tracking system. In order to improve the real-time performance of the target tracking system, the hardware of the algorithm has become a mainstream method. The general image data is very large, and it is far from enough to simply use the internal resources of the FPGA, and the SRAM has a large storage spac...

AI Technical Summary

Problems solved by technology

However, the general image data is very large, and it is far from enough to simply use the internal resources of FPGA, while SRAM has a large storage space

In 2007, Kang Yanxia and others proposed a ping-pong cache design using two SRAMs to realize data (Kang Yanxia, ​​Jianzhong. Design of ping-pong cache in real-time video processing system. Bulletin and Guidance Journal. 2007.27(4): 218-221), Using two SRAMs to complete the ping-pong cache, although it is simple to implement and has good real-time performance, it causes a waste of off-chip resources

Images