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Integrated circuit

A technology of integrated circuits and interface circuits, applied in logic circuits, logic circuits using specific components, electrical components, etc., can solve problems such as difficulty in reducing costs and changes in the maximum operating frequency of FPGAs, and achieve the effect of realizing circuit functions

Inactive Publication Date: 2014-05-28
DENSO CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, there is the following problem: Whenever the FPGA is redesigned, the maximum operating frequency of the FPGA may change
Therefore, due to the large area, it is difficult to reduce the cost compared with dedicated LSI and ASIC

Method used

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Experimental program
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Embodiment

[0151] 2-1 Configuration of logic element block

[0152] Figure 17 is a diagram showing a gate-level circuit structure (ie, a logic element block) of the above-mentioned logic reconfiguration element and the above-mentioned memory element group. The memory element block stores configuration information for configuring the functions of the logic reconfiguration element.

[0153] Logic reconfiguration element 110 has four 3-input NAND gates 101 , 102 , 103 and 104 . The logic reconfiguration element 110 also has a four-input NAND gate 105 to which all outputs of the four 3-input NAND gates are input.

[0154] exist Figure 17 A logical expression of the output of the logical reconfiguration element 110 is shown in . based on being supplied to terminal C 0 、C 1 、C 2 、C 3 , the signal c of terminal A and terminal B 0 、c 1 、c 2 、c 3 , a, b to provide output X to terminal X. signal c 0 、c 1 、c 2 、c 3 , signal a and signal b correspond to Figure 10-15 The S shown ...

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Abstract

Provided are an integrated circuit whereby surface area, cost, logic change function, operating frequency, flexibility, through-put, and power consumption can all be improved, and a reconfigurable processor capable of changing a command function. Basic cells of four inputs A, B, L, and R and two outputs X and Y are arranged like bricks, constituting a reconfigurable array. Based on selection information, an A / L selection and a B / R selection are made, and based on setting information, logic calculation outputs having A / L and B, and B / R and A as inputs, as well as forward / reverse outputs of the inputs, are outputted to adjacent basic cells.

Description

technical field [0001] The present invention relates generally to integrated circuits, and in particular to integrated circuits capable of reconfiguring logic, reconfigurable processors having instruction sets capable of changing functions, and compilation processing methods. The present invention relates to an improved invention of the invention described in PCT / JP2011 / 053225 filed by the same applicant (hereinafter referred to as the basic invention). Background technique [0002] Conventionally, in semiconductor integrated circuits, high performance and small chip area have been realized by designing dedicated LSIs (Large Scale Integration), and low manufacturing costs have been realized by mass production. However, development is required for each individual application, and there is a tendency to increase development costs. In addition, it is not easy to change the function of the dedicated LSI. Often, when this functionality needs to be changed, some or all of the de...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/177
CPCH03K19/177H03K19/17712H03K19/1733H03K19/17728H03K19/17704
Inventor 伊藤智康
Owner DENSO CORP