Digital audio broadcasting subcarrier matrix processing method and device

Abstract

The invention relates to a digital audio broadcasting subcarrier matrix processing method and device. The method includes the following steps that: bit grouping is performed on transmitted bit streams containing service data, and service data symbols are obtained based on the bit grouping; time-delay processing is performed on the service data symbols, and the storage position addw of the service data symbols in the time-delay processing after interleaving and matrix filling is calculated; and the service data symbols which have been subjected to the time-delay processing and the storage position addw are outputted simultaneously based on the same clock. According to the digital audio broadcasting subcarrier matrix processing method and device of the invention, a process in the prior art is converted into bit interleaving, first block interleaving and secondary block interleaving sequentially from first block interleaving, bit interleaving and secondary block interleaving sequentially, and therefore, a data transfer phenomenon in subcarrier matrix filling and subcarrier interleaving processes can be effectively avoided, and timing design of a system can be effectively simplified, and as a result, with the method and device of the invention adopted, the processing speed of a subcarrier matrix can be improved, and processing power consumption of the subcarrier matrix can be decreased.

Description

technical field [0001] The present invention relates to digital audio broadcasting technology, in particular to a digital audio broadcasting subcarrier matrix processing method and device. Background technique [0002] Digital audio broadcasting system refers to a broadcasting system that uses digital audio coding, data compression, error correction coding, and digital modulation to fully digitally process audio broadcasting signals. [0003] At present, my country's digital audio standard is a system transmission scheme optimized for frequency modulation, and its realization principle is as follows: figure 1 shown. [0004] The FPGA (Field Programmable Gate Array, Field Programmable Gate Array) implementation principle of the digital audio standard is as follows: figure 2 shown. figure 2 Sub-carrier matrix filling and sub-carrier interleaving are key processes in digital audio standards. [0005] Subcarrier matrix filling is mainly to calculate the filling address of ...

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Problems solved by technology

[0031] The inventor finds in the process of realizing the present invention: since there are corresponding restrictions on the number of pins of the FPGA chip, its own storage space, and the external storage media it can connect to, the storage resources that the FPGA chip can use are very limited; However, the data volume of the business data interleaving block is very large. In this way, during the calculation of the interleaving address of the MSIS element and the calculation of the matrix filling address, a large amount of data transfer processing will be involved, which will not only reduce the storage resources of the FPGA chip Supply and demand are contradictory, and storage time is increased

In addition, since data storage operations need to meet exclusive timing requirements, and different types of data need to be stored in non-overlapping time periods, plus the transfer of MSIS elements during the interleaving process, these will make the timing design of the entire system becomes very complex, which ultimately affects the overall speed and power consumption of the system

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