A kind of multi-DSP and FPGA parallel processing system and realization method

A parallel processing, FPGA4 technology, applied in the direction of electrical digital data processing, instruments, etc., can solve the problems of parallel interface signal line interference, interference, etc., and achieve high performance

Active Publication Date: 2017-01-04
杭州雷世科技有限公司
View PDF4 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the parallel interface has the problem of interference between signal lines, and the larger the data bit width and the higher the frequency, the more serious the interference

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A kind of multi-DSP and FPGA parallel processing system and realization method
  • A kind of multi-DSP and FPGA parallel processing system and realization method
  • A kind of multi-DSP and FPGA parallel processing system and realization method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0120] See figure 1 — Figure 7 , the multi-DSP and FPGA parallel processing system of the present invention includes: FPGA, DSP, AD, DA, DDR3, and power supply chip.

[0121] The present invention includes multiple FPGAs, and the functions of each FPGA are different. FPGA1 of the interface board controls two channels of AD to collect data; the collected data can be preprocessed; the preprocessed results are transmitted to FPGA4 and FPGA5 of the core board through SRIO; the processing results of FPGA4 and FPGA5 are received at the same time; SRIO is passed to DSP1 of the interface board; it receives the command of DSP1 and controls FPGA2 of the interface board according to the command. FPGA2 of the interface board controls the DA output waveform according to the command of FPGA1. The function of the FPGA3 of the core board is to control the power-on sequence of the core boards DSP2 and DSP3. The functions of FPGA4 and FPGA5 of the core board are similar, and they cooperate...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a multi-DSP and multi-FPGA parallel processing system which comprises FPGAs, DSPs, ADs, a DA, DDR3s and power supply chips. An implement method of the multi-DSP and multi-FPGA parallel processing system includes the following five steps: (1) achieving PCIe interconnection between the FPGAs, (2) achieving PCIe interconnection between the FPGAs and the DSPs, (3) achieving SRIO interconnection between the FPGAs, (4) achieving SRIO interconnection between the FPGAs and the DSPs, and (5) achieving Hyperlink interconnection between the DSPs. The multi-DSP and multi-FPGA parallel processing system is high in parallel processing capacity, abundant in function and high in flexibility and extensibility, data transmission bottlenecks between processor chips are broken, and the multi-DSP and multi-FPGA parallel processing system is high in transportability and have the good practical value in the digital signal processing field.

Description

technical field [0001] The invention relates to a multi-DSP and FPGA parallel processing system and an implementation method. It is based on high-speed serial protocols such as PCIe, SRIO and Hyperlink, and realizes high-speed serial interconnection in the multi-DSP and FPGA parallel processing system, which belongs to digital signal processing. field. Background technique [0002] High-speed serial interface generally refers to the serial interface using differential technology and clock embedded technology. Unlike low-speed serial interfaces such as SPI, the transfer rate of high-speed serial interfaces can reach several Gbps. The high-speed serial interface uses differential signal lines instead of single-ended signal lines, thereby enhancing anti-interference and anti-noise capabilities. Compared to parallel interfaces, serial interfaces require fewer pins, thereby increasing the number of ports that can be integrated and simplifying PCB traces, cables, and connector s...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/42
Inventor 王俊赵志鹏张玉玺王晓亮樊文贵
Owner 杭州雷世科技有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products