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Multi-DSP and multi-FPGA parallel processing system and implement method

A parallel processing, FPGA4 technology, applied in the direction of electrical digital data processing, instruments, etc., can solve the problems of parallel interface signal line interference, interference, etc., and achieve high performance

Active Publication Date: 2014-06-25
杭州雷世科技有限公司
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Problems solved by technology

However, the parallel interface has the problem of interference between signal lines, and the larger the data bit width and the higher the frequency, the more serious the interference

Method used

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  • Multi-DSP and multi-FPGA parallel processing system and implement method
  • Multi-DSP and multi-FPGA parallel processing system and implement method
  • Multi-DSP and multi-FPGA parallel processing system and implement method

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Embodiment Construction

[0120] See figure 1 — Figure 7 , the multi-DSP and FPGA parallel processing system of the present invention includes: including: FPGA, DSP, AD, DA, DDR3, power chip.

[0121] The present invention includes multiple FPGAs, and the functions of each FPGA are different. The FPGA1 of the interface board controls the two ADs to collect data; the collected data can be preprocessed; the preprocessed results are passed to the FPGA4 and FPGA5 of the core board through SRIO; the processing results of FPGA4 and FPGA5 are received at the same time; SRIO is passed to DSP1 of the interface board; receives the order of DSP1 and controls FPGA2 of the interface board according to the order. FPGA2 of the interface board controls the DA output waveform according to the command of FPGA1. The function of FPGA3 on the core board is to control the power-on sequence of DSP2 and DSP3 on the core board. The functions of FPGA4 and FPGA5 of the core board are similar, and cooperate with DSP2 and DSP...

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Abstract

The invention discloses a multi-DSP and multi-FPGA parallel processing system which comprises FPGAs, DSPs, ADs, a DA, DDR3s and power supply chips. An implement method of the multi-DSP and multi-FPGA parallel processing system includes the following five steps: (1) achieving PCIe interconnection between the FPGAs, (2) achieving PCIe interconnection between the FPGAs and the DSPs, (3) achieving SRIO interconnection between the FPGAs, (4) achieving SRIO interconnection between the FPGAs and the DSPs, and (5) achieving Hyperlink interconnection between the DSPs. The multi-DSP and multi-FPGA parallel processing system is high in parallel processing capacity, abundant in function and high in flexibility and extensibility, data transmission bottlenecks between processor chips are broken, and the multi-DSP and multi-FPGA parallel processing system is high in transportability and have the good practical value in the digital signal processing field.

Description

technical field [0001] The present invention is a multi-DSP and FPGA parallel processing system and its implementation method. It is based on high-speed serial protocols such as PCIe, SRIO, and Hyperlink, and realizes high-speed serial interconnection in multi-DSP and FPGA parallel processing systems, belonging to digital signal processing field. Background technique [0002] High-speed serial interfaces generally refer to serial interfaces using differential technology and clock embedding technology. Unlike low-speed serial interfaces such as SPI, the transfer rate of high-speed serial interfaces can reach several Gbps. The high-speed serial interface uses differential signal lines instead of single-ended signal lines, thereby enhancing the anti-interference and anti-noise capabilities. Compared with the parallel interface, the serial interface requires fewer pins, so it can increase the number of ports that can be integrated and simplify PCB routing, cables and connector...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/42
Inventor 王俊赵志鹏张玉玺王晓亮樊文贵
Owner 杭州雷世科技有限公司
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