How to form a test line

Abstract

The present invention provides a method for forming a test line, comprising: providing a substrate with a test material layer; forming a first test pattern on the test material layer; forming a first side wall on the side wall of the first test pattern ; removing the first test pattern to form a first closed pattern; forming a first gap on the first closed pattern to form a second test pattern; forming a second side wall on the side wall of the second test pattern; removing the second test pattern to form a second closed pattern; forming a second gap on the second closed pattern to form a third test pattern; transferring the third test pattern to the test material layer to form a test pattern Wire. The method for forming the test line provided by the technical solution of the present invention can produce a test line with a relatively large length in an area with a small area, and the test line with a large length can be used to accurately test the resistivity of the material for making the test line. Therefore, it is beneficial to obtain accurate resistivity of the metal wire in the functional area.

Description

technical field [0001] The invention relates to the field of semiconductor technology, in particular to a method for forming a test line. Background technique [0002] In the semiconductor back-end process, test lines of a certain length are usually fabricated in a certain blank area of ​​the wafer surface. The test line is made of the same material as the metal lines (such as metal interconnect lines) in the functional area of ​​the semiconductor device. Its function is to replace the metal lines in the functional area to receive resistance value detection, and calculate the resistance value according to the detected resistance value. Test the resistivity of the wire to obtain the resistivity of the metal wire of the functional area. [0003] If the length of the test line is small, it is detected that the resistance value of the test line is unstable, and the accuracy of the resistivity obtained by the test line is low. For this reason, it is usually necessary to set the...

AI Technical Summary

Problems solved by technology

However, with the improvement of the integration level of semiconductors, the utilization rate of semiconductor design on the wafer surface is getting higher and higher, resulting in smaller and smaller blank areas that can be used to make test lines.

The manufacturing method of the existing test line is usually realized by photolithography process. For example, the Chinese invention patent application with the publication number CN101894756A provides a "method for forming grooves, a method for forming metal wiring, photolithography method and equipment" , but limited by the resolution of the photolithography process, it is impossible to make a test line with a large length in a small area by using the photolithography process

Images