Integrated manufacturing method of polysilicon resistance in silicon germanium hbt process

Abstract

The invention discloses a polysilicon resistor integration production method in a silicon-germanium HBT process. The method includes the steps of depositing a first polysilicon layer and doping; performing photolithographic etching on the first polysilicon layer to form a polysilicon resistor; depositing a second silicon oxide layer and performing reverse etching on the second silicon oxide layer to form a sidewall of the polysilicon resistor; using a thermal oxidation process to form a third silicon oxide layer; depositing a fourth silicon oxide layer and a fifth polysilicon sub-crystal layer sequentially; using a photolithography process and an etching process to open the window of an epitaxial layer of the silicon-germanium; depositing an epitaxial layer of the silicon-germanium and a sixth silicon oxide layer; using the photolithographic process to define a formation area of the base area of a silicon-germanium HBT; using a wet etching process to remove the sixth silicon oxide layer outside the base area; using a dry etching process to remove the silicon-germanium epitaxial layer outside the base area and the fifth polysilicon sub-crystal layer and forming the base area. The polysilicon resistor integration production method in the silicon-germanium HBT process can eliminate the residual polysilicon on the periphery of the polysilicon resistor to improve the surface uniformity of the polysilicon resistor.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit manufacturing process method, in particular to a polysilicon resistor integrated manufacturing method in a silicon germanium (SiGe) heterojunction bipolar transistor (Heterojunction bipolar transistor, HBT) process. Background technique [0002] The RF front-end chip circuit used in the communication field generally consists of four parts: power amplifier, low noise amplifier, switch circuit and simple logic control circuit. The power silicon germanium HBT process, after integrating SiGe NPN, PNP, resistors, capacitors (including variable capacitors), inductors and switching devices, can meet the requirements of on-chip matching, logic control and transceiver conversion in the circuit. [0003] On the basis of the silicon germanium HBT process, it is very important to integrate various devices and obtain better uniformity and a larger process window. Capacitors and inductors are separate devi...

AI Technical Summary

Problems solved by technology

In this step, since the silicon oxide layer 107 is etched by a dry etching process, since the sidewall 103 of the polysilicon resistor 102 is relatively steep, please refer to Figure 1A In the region shown in the dotted line box 108, each layer deposited is thicker from the vertical direction, that is, the longitudinal thickness of each layer in the dotted line box 108 is thicker; as Figure 1B As shown, when the silicon oxide layer 107 in the base region is dry etched, insufficient etching will result in silicon oxide residue 107a

like Figure 1C As shown, the silicon oxide residue 107a becomes a barrier layer during the subsequent etching of the polysilicon, that is, the silicon germanium epitaxial layer 106 and the polysilicon seedling 105, resulting in the base polysilicon residue 105a along the polysilicon resistor, which is then cleaned during subsequent ultrasonic cleaning. Become a defect and affect the uniformity of polysilicon resistance

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