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Packaging method of board-level fan-out structure

A packaging method and fan-out technology, which is applied in the manufacture of electrical components, circuits, semiconductors/solid-state devices, etc., can solve the problems of low board-level fan-out structure and mechanical warpage manufacturing efficiency of board-level fan-out structure, etc. Achieve the effect of improving production efficiency, ensuring quality and performance

Active Publication Date: 2017-01-04
北京中科微投资管理有限责任公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The technical problem to be solved by the present invention is to provide a packaging method for board-level fan-out structures that can solve the problem of easy mechanical warpage in the manufacturing process of board-level fan-out structures and low manufacturing efficiency

Method used

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  • Packaging method of board-level fan-out structure
  • Packaging method of board-level fan-out structure
  • Packaging method of board-level fan-out structure

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Embodiment Construction

[0029] see figure 1 , an embodiment of the present invention provides a packaging method for a board-level fan-out structure, including:

[0030] Step 1: See figure 1 , press the first double-layer copper foil 2 on the upper side of the core board 1 (using prepreg or double-sided copper-clad organic substrate), and press the second double-layer copper foil 3 on the lower side of the core board 1; The layer copper foil 2 and the second double-layer copper foil 3 are peelable structures. The thickness of the outer layer copper foil in the first double layer copper foil 2 is greater than the thickness of the inner layer copper foil; the thickness of the outer layer copper foil in the second double layer copper foil 3 is greater than the thickness of the inner layer copper foil.

[0031] Step 2: See figure 2 The first chip 4 is mounted on the outside of the first double-layer copper foil 2, the second chip 5 is mounted on the outside of the second double-layer copper foil 3, a...

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Abstract

The present invention relates to the technical field of electronic packaging, in particular to a packaging method of a board-level fan-out structure, including: laminating copper foil, mounting chips, laminating dielectric layers, making blind holes, making circuits, and laminating soldering layers , ball planting and stripping steps. In the packaging method of the board-level fan-out structure provided by the present invention, two fan-out packaging structures are symmetrically designed on the upper and lower sides of the core board. During the manufacturing process, the force on the upper and lower ends of the core board is symmetrical and uniform; Before peeling off the first double-layer copper foil structure and the second double-layer copper foil structure, high-temperature annealing is used to eliminate internal stress, so mechanical deformation problems such as warping will not occur, ensuring the quality and performance of the fan-out structure. In addition, the packaging method of the board-level fan-out structure provided by the present invention can manufacture two fan-out structures at the same time, thereby improving production efficiency.

Description

technical field [0001] The invention relates to the technical field of electronic packaging, in particular to a packaging method of a board-level fan-out structure. Background technique [0002] Electronic high-density packaging is widely valued by the industry. The three-dimensional stacking of chips effectively reduces the three-dimensional size of the device, and the stacking method between chips is also continuously improved. From Flip Chip to silicon-based TSV (Through Silicon Via) through-hole interconnection technology, the three-dimensional size of devices has become smaller and smaller. The packaging process has also evolved from the original bonding, patch, and plastic packaging to key process technologies such as RDL, Flip Chip, wafer bonding, and TSV introduced in the front-end process, making packaging structures with higher chip density and smaller size continue to emerge. During the manufacturing process of the existing fan-out structure, problems such as w...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/60H01L21/58
Inventor 郭学平
Owner 北京中科微投资管理有限责任公司
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