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Apparatus and method for providing multi-core programming platform

A platform, memory mapping technology, applied in program control device, program control design, input/output process of data processing, etc., can solve the problems of time-consuming, complexity, and lack of multi-core computer memory.

Active Publication Date: 2017-08-29
POLYCORE SOFTWARE
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  • Summary
  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

These approaches are often compiler toolchain dependent, do not provide application portability and platform-specific optimizations are time consuming and expensive
[0006] Thus, current solutions are either architecture-specific and thus do not provide application portability, or do not provide adequate means for handling multi-core computer memory, or both, resulting in complexity and non-portability

Method used

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Embodiment Construction

[0027] The present advances described herein are directed to portable memory maps that can be ported to multiple multi-core platforms.

[0028] Portable memory-mapping methods and apparatus, also known as memory-mapping, provide fully portable memory-map definitions with greatly simplified multi-core platform-specific memory layout and memory utilization, see figure 1 . Depending on the embodiment, multiple cores in a multi-core computer or platform may be on a single chip or on multiple chips. A memory map definition is generated from a user-defined memory map. In some embodiments, the memory map definition includes a value representing a symbolically defined definition of the memory map provided in the descriptor file format. The descriptor file format is independent of architecture tools and development tools. That is, the descriptor file format is compiler, assembler, and linker independent. In some embodiments, the memory map definition is symbolically referenced from...

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Abstract

A computer-implemented method for generating a memory map of a target computer includes specifying at least one identifier associated with a memory layout of a target computer from a plurality of identifiers stored in memory of a host computer. The method also includes specifying a value associated with the specified at least one identifier. The method also includes generating a memory map definition of the memory map using the at least one identifier and the associated at least one value. The method also includes deploying on the target computer software that incorporates the memory map definition and includes executable instructions that reference the at least one identifier replaced with an associated value.

Description

[0001] Cross References to Related Applications [0002] The earlier filing date of U.S. Provisional Application No. 61 / 615,095, filed March 23, 2012 and titled "Apparatus and Method for Providing a Multicore Programming Platform," as required by this application under title 35, U.S.C. § 119, subparagraph e rights and interests of the application, the entire contents of which are hereby incorporated by reference. Background technique [0003] Memory access is a major limiting factor in computer performance. While processors have gotten faster, memory access times have not improved at the same rate. The increasing number of computer components used to improve computer performance, such as multi-core processors and hardware accelerators, compete for access to the same processor, exacerbating this problem. To alleviate this widening memory access gap, memory architectures have evolved and become increasingly complex, such as multi-level caches, local and global memories, and on...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/44
CPCG06F9/5016G06F9/44542G06F9/44557Y02D10/00G06F3/0629
Inventor S·布瑞尔梅尔T·阿布尔拉塔D·图尔内尔
Owner POLYCORE SOFTWARE
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