56 results about "Linker" patented technology

The invention relates to the technical field of computer compiling, and discloses a method and a device for simultaneously compiling multiple architectures, computer equipment and a storage medium. According to the method for simultaneously compiling the multiple architectures, the code files input by the user are processed through the user-defined linker, the multiple code files are analyzed, and therefore analysis operation in the compiling process in all the architectures can be advanced, and a unified intermediate file is generated. And continuing to compile the generated unified intermediate file in each architecture, and finally obtaining an executable file or a library file corresponding to each architecture. According to the embodiment of the invention, the analysis operation is advanced, and the unified intermediate file is generated, so that the analysis operation does not need to be executed for multiple times when compiling is continued under each framework, and the effects of shortening the compiling time and saving computing resources can be achieved.

1. The name of the design product: joint. 2. The use of the design product: for pipe connection. 3. The design points of the design product: in shape. 4. The picture or photo that best shows the design points: perspective view.

The invention relates to a custom workflow architecture and plug-in system based on a large language model. The custom workflow architecture and plug-in system comprises a server and an interface interaction display device connected with the server, wherein the server carries a custom workflow architecture module and a plug-in module based on a large language model; the interface interaction display device can interact and display working interfaces of the custom workflow architecture module and the plug-in module; the user-defined workflow architecture module can call plug-ins in the plug-in module; the interface interaction display device can help a user to interact with the custom workflow architecture module in the form of a graphical draggable window, and is used for connecting a plurality of plug-ins in series according to the requirements of the user to form the custom workflow. According to the custom workflow architecture and plug-in system provided by the invention, the graphical drag linker is introduced, so that a user can freely combine and configure various plug-ins to construct personalized workflows.

The invention relates to the technical field of firmware updating, in particular to an embedded firmware compilation-free updating method which comprises the following steps: S1, firmware is divided into a plurality of independent function modules through a link script, and each function module is allocated to an independent memory address interval and recorded in a section table; s2, in response to the module replacement instruction, reading an identifier and a version number of a target function module; s3, positioning a target memory address of the target function module according to the section table, and executing compatibility check; s4, if the compatibility check is passed, writing binary data atoms of the new function module into a target memory address interval under the protection of a memory barrier; and S5, updating a module version mark in the section table, and triggering soft restart to enable the new function module to take effect. The firmware is divided into independent modules, the updating efficiency and flexibility of the firmware are improved, real-time loading and replacement of the firmware modules are supported, the flexibility and response speed of the system are improved, an automatic rollback mechanism is introduced, and the stability and safety of the system are guaranteed.

This invention provides a method for protecting So files from memory dumping in the Android system. The method includes: adjusting the memory mapping behavior of the `mmap` function in the Linker to prevent reporting So file memory mapping information to the maps file; calling a custom function to modify the file header characteristics of the So file and erasing the header characteristics; and hiding the So file record in the shared object list `solist`, thereby protecting the So file. This method effectively prevents So files from being illegally dumped in memory in the Android system, protecting the operational security of applications. Furthermore, because the implementation considers a balance between security and performance, this solution is applicable to various commercial and personal Android devices.

The application discloses a generation method of a software system for debugging. GN is used to generate a Ninja build file for a current software system, and a link response file is generated when the Ninja build file is required to build. Ninja is used as a build tool for the current software system, and the modified Ninja build file is used for building. A target path is newly created, and a linker script, a link response file, static library files and object files listed in the link response file in the current software system are copied to the target path. Absolute paths of all object files and static library files recorded in the link response file in the target path are updated. A CMake special configuration file is modified, and all directories and files in the target path constitute a software system for debugging. The application generates a simplified software system for debugging from an originally huge software system, and the copyright is protected.

1. The name of the design product: joint. 2. The use of the design product: used for air conditioning pipe penetration test integrated joint. 3. The design points of the design product: in shape. 4. The picture or photo that best indicates the design points: perspective view.

A system and method for determining the placement of software functions at link time is disclosed. The system utilizes special annotations that are included in software modules of the source code, which defines certain parameters associated with each function. These parameters may be referred to as code classification components, wherein each code classification component may include one or more code classes associated with that code classification component. These software modules are then compiled. A linker script is created based on the desired configuration. The linker then uses the linker script to determine which software modules should be placed in RAM for improved execution speed.

The invention discloses an embedded multi-user cooperation development method based on RTOS, and the method comprises the steps: a linker specifies a code segment of a code link, and the code segment comprises a peripheral module and a task module; defining a specific macro, putting the declaration function address into a specific code segment in the code segments by adopting the specific macro, and sorting; defining callback functions of the peripheral module and the task module in the main function; and compiling a driver of the peripheral module and / or a driver of the task module according to the preset task function demand information. When the driver of the peripheral module and the driver of the task module are compiled, only the driver is created in the own module, and the main function does not need to be directly modified, so that the conflict risk caused by intensively modifying the main function in a traditional development mode is avoided; different functions are not directly coupled, so that later-stage codes are easier to test, reuse and migrate, and meanwhile later-stage function expansion and debugging positioning are facilitated.

A device compiler and linker is configured to optimize program code of a co-processor enabled application by resolving generic memory access operations within that program code to target specific memory spaces. In situations where a generic memory access operation cannot be resolved and may target constant memory, constant variables associated with those generic memory access operations are transferred to reside in global memory.

1. Name of the product in this design: Connector (Y-type). 2. Purpose of this design: For connecting three pipes together. 3. The key design feature of this product is its shape. 4. The image or photograph that best illustrates the design's key points: 3D view 1.

This application relates to the field of virtual machine technology, specifically providing a virtual machine and a method, apparatus, device, and medium for generating its loading file, aiming to solve the problem that applications can only support one programming language on limited hardware resources. To this end, the loading file generation method of this application includes: generating a target linker file for a first application programming interface based on a predefined loading file format and linker file format for the target virtual machine; generating a second application programming interface for at least one second programming language based on the target linker file; and compiling and converting a target application that calls the second application programming interface based on the second application programming interface and the target linker file to generate the loading file for the target virtual machine. This method supports program development in multiple programming languages, improving the freedom of language selection and development efficiency. Furthermore, the implementation of the application programming interface does not require maintaining multiple versions, simplifying the management and maintenance of the interface source code.

The application discloses an API granularity-based shared library deflation method and system, which comprises the following steps: clustering page-aligned dependent clusters by analyzing the function dependence of each exported API offline, and rewriting the binary layout; intercepting API calls by a customized dynamic linker at runtime, dynamically adjusting the code page execution authority in combination with metadata, and activating only the required page of the current API; the scheme can maintain the cross-process memory sharing of the shared library, avoid memory inflation caused by copy-on-write (CoW), reduce the number of available gadgets by more than 90%, and significantly improve the ROP / JOP attack resistance; the system supports multithreading safety, hot API optimization, is compatible with the standard ELF format, does not need to modify the application, is transparent in deployment, and is suitable for Linux high-security and high-density running environments; the application can maintain the cross-process memory sharing advantage of the shared library while significantly reducing the attack surface and memory inflation problem.

The invention provides a code compiling method and a compiler tool chain, the compiler tool chain comprises a compiler preprocessing module, a macro definition controller, a code generator and a linker, and the method comprises the steps that the compiler preprocessing module determines hardware feature parameters corresponding to a target processor from an instruction set configuration file corresponding to the target processor; the macro definition controller performs conflict check on the hardware feature parameters based on the hardware feature constraint table; under the condition that the hardware feature parameters have conflicts, adjusting the hardware feature parameters to obtain target hardware feature parameters, and generating a conditional compiling macro set based on the target hardware feature parameters; logic dependency rules among the hardware feature parameters are defined in the hardware feature constraint table; the code generator carries out conditional compiling on the to-be-compiled function body based on the conditional compiling macro set, and a compiled target file corresponding to the target processor is generated; and the linker generates an executable function mirror image corresponding to the target processor based on the target file.

A data processing system includes a data processing arrangement, wherein the data processing arrangement includes computing hardware for executing one or more software products, wherein execution of the one or more software products configures the data processing arrangement to access data from a file system arrangement. The data processing arrangement is operable to load a dynamic linker that is operable to include an intercept library that intercepts file access operations of an executable software product wherein: (i) a virtual file that does not exist on the file system arrangement becomes accessible to the executable software product; (ii) the virtual file is a result of either (a) a just-in-time translation of one or more real files of the file system arrangement, wherein the just-in-time translation is made from one file format to another file format, or (b) conversion of the access operation to an equivalent cloud object-storage access operation(s) on a real object located on the cloud object-storage, or (c) a combination of the just-in-time translation of (a) with the object access conversion from (b). Optionally, at least one of: (iii) the virtual file is a different file format to the real file / object, wherein a compressed file format and the virtual file are mutually different file formats; and (iv) the file formats are genomic file formats.

The invention discloses a program code optimization method and device in a link stage, equipment and a storage medium, and the method comprises the steps: traversing each target file input into a linker, and obtaining a program section in each target file; if the program section is a clustering base point function, creating a kernel clustering instance corresponding to the clustering base point function, and executing clustering optimization operation on the clustering base point function according to the kernel clustering instance; and after the clustering base point functions in all the target files complete the clustering optimization operation, executing a linking operation on each target file. According to the technical scheme, the feasibility of the code optimization method can be improved, the influence of instruction cache deletion is eliminated, and the performance of an executable program is greatly improved.

1. The name of the design product: joint. 2. The use of the design product: for pipe connection. 3. The design points of the design product: in shape. 4. The picture or photo that best shows the design points: design 1 perspective view. 5. Design 1 is designated as the basic design.

This application discloses a cross-data space data synchronization method based on connector construction, belonging to the field of data integration. The method includes: determining a source connector and a target connector based on a user-submitted task definition file; the source connector is the connector corresponding to the source data space, and the target connector is the connector corresponding to the target data space; each connector includes a connection configuration unit, a data pattern descriptor, semantic mapping rules, a data reading interface, and a data writing interface; determining a data synchronization task graph based on the semantic mapping rules of the source connector and the target connector; reading the original data from the source data space through the source connector; mapping the original data pattern and original semantics corresponding to the original data to a general data pattern and general semantics; mapping the general data of the general data pattern and general semantics to the target data of the target data pattern and target semantics through the target connector; and writing the target data into the target data space.

The invention provides a code utilization rate calculation method and device, electronic equipment and a computer medium, and relates to the technical field of data processing, in particular to the technical fields of application program development, data compression and the like. According to the specific implementation scheme, a link mapping file generated by compiling the application program is obtained, symbol information of a class defined in the application program is analyzed from the link mapping file, and a first class set is constructed; by intercepting an initialization method of each class to be monitored in a runtime environment of the application program, recording class information corresponding to a triggered initialization event, and constructing a second class set; and determining code utilization rate information of the application program according to a comparison result of the first class set and the second class set.

This invention discloses a program protection method, comprising: S1, compiling target source code into an address-independent executable file, generating a target linker file based on the executable file, and creating an export interface and setting loading logic in the target linker file based on the executable file; S2, generating a user executable file based on the target linker file, the user executable file including an attached executable file generated based on the executable file, executing a loading process for the attached executable file according to the export interface, and running the attached executable file according to the loading logic; S3, performing a legality check on the runtime environment of the user executable file, determining whether the runtime environment of the user executable file passes the legality check; if yes, the attached executable file provides software services; if no, the attached executable file does not provide software services. This program protection method can protect the core logic of a program and prevent software abuse.

The invention discloses a method for optimizing the starting speed of an application, which comprises the following steps of: (1) initialization and data collection: acquiring original symbol analysis behavior reference data of a target application program before optimization, and generating a record A; and (2) analysis and optimization scheme generation: according to the record A in the step (1), analyzing the actual use condition of the dynamic library, and generating a dynamic library loading sequence optimization scheme. And (3) ELF file modification: applying the optimization scheme generated in the step (2) to an ELF file of a target application program. And (4) verification and confirmation: verifying the correctness and validity of the optimization scheme. By analyzing the symbol analysis record in the starting process of the application program and counting the actual symbol hit frequency and the analysis path information of each dynamic library, the dynamic library dependency sequence declared in the ELF file of the application program is intelligently adjusted, so that the dynamic linker can more efficiently position symbols during subsequent starting, the global search overhead is reduced, and the search efficiency is improved. And application starting time is shortened.

Herein is innovative control flow integrity (CFI) based on code generation techniques that instrument data protection for access control of subroutines invoked across module boundaries. This approach is counterintuitive because, even though code is stored separately from data, access control to the data is used to provide access control to the code. In an embodiment, an instrumentation computer generates, at the beginning of a subroutine that is implemented in machine instructions, a prologue that contains: a first instruction of the subroutine that indicates that the first instruction is a target of a control flow branch and a second instruction of the subroutine that verifies that a memory address is accessible. Generated in the machine instructions are instruction(s) that, when executed by a processor, cause the memory address to have limited accessibility. Some code generation may be performed at the start of runtime by a loader or a dynamic linker.

1. The name of the design product: joint. 2. The use of the design product: used for data line joint to transmit electrical signal. 3. The design points of the design product: in shape. 4. The picture or photo that best shows the design points: perspective view 1. 5. Other circumstances that need to be explained: the A part in perspective view 2 is signal line.

This invention provides a method and terminal for writing information into MCU firmware. The method involves obtaining characteristic data of the MCU's interrupt vector table and determining the end address of the interrupt vector table based on the characteristic data. An array is created in the C language module of the original firmware, and the address of the array is mapped to the physical address of the assembly module in the original firmware. A linker script is obtained, and the address after the end address is defined as the physical address in the linker script. A parsing tool is created, which obtains the information space of the original firmware and writes customized information into the information space to generate new firmware. This application customizes and modifies information within the MCU firmware without changing the original firmware code. By utilizing the changing physical addresses within the firmware, it avoids third-party software arbitrarily tampering with firmware information through field matching and other methods, thus ensuring the security of the firmware information.

This invention provides a transposase library construction method and related products for reducing adapter dimers in libraries, belonging to the field of biotechnology. By optimizing the primers and polymerases used in the transposase library construction process, this invention effectively reduces the proportion of adapter dimers in libraries with low input levels, thereby improving sequencing quality.

A system and method for allocating instructions and data in a common memory device that uses aliased addresses is disclosed. The linker uses a linker script that tracks the amount of space that is allocated in the common memory device. It then uses this information to properly adjust the starting addresses for the different address ranges to ensure that no information is overwritten or corrupted. This technique allows instructions to be disposed in the same memory device as other data, but be accessed using an aliased address. This is particularly beneficial for processing units that utilize different busses for instructions and data.

This application discloses a method for self-moving and decompressing the linker script in the HarmonyOS system. The linker script file specifies the memory address to be loaded into a memory space with sufficient capacity and the highest operating efficiency for the segments to be moved; a global list is created based on the memory layout rules for each segment of each application in the linker script. A self-moving and self-decompressing program is implemented in the HarmonyOS system. When loading each segment of each application into the memory space of the embedded device, the HarmonyOS system first queries the pre-loaded global list for that segment. This application allows for more flexible and reasonable allocation of memory space for different segments of an application, which is beneficial for improving the operating efficiency of the application.

1. The name of the design product: joint (GXFY04). 2. The use of the design product: joint for kitchen and bathroom equipment and pipe connection. 3. The design points of the design product: in shape. 4. The picture or photo that best indicates the design points: perspective view.