85 results about "Linker" patented technology

Techniques for handling natural language query processing are described. In some examples, entities are recognized during an entity recognition phase and then relations between those entities are determined. Those relations are fed to an entity linker to help the linker link candidate to columns and / or a intent representation generator to help parse multiple values and column pairs of a natural language query.

The present invention discloses a C++ vector programming method based on a domestic heterogeneous platform, and the programming method comprises the following steps: S1, obtaining support for vector data types and vector programming interfaces by introducing header file simd.h; S2, the compiler performs front-end processing on the C++ vector program to generate intermediate representation code; S3, the compiler mid-end optimizes the intermediate representation code generated in S25 to generate a new intermediate representation; S4, the compiler mid-end generates instructions for the optimized intermediate code in step S3 to form vector assembly code; S5, generates machine code; S6, the linker mixes and links all the master core and slave core machine codes generated above into an executable code; S7, runs the executable code on a heterogeneous multi-core platform. The present invention provides a new programming method for the application development of the domestic heterogeneous multi-core architecture, which is conducive to maximizing the advantages of the architecture and improving application performance.

The invention provides a method for protecting an So file from being subjected to memory Dump based on an Android system, which comprises the following steps of: adjusting an So file memory mapping behavior of an mmap function in a dynamic linker, and not reporting So file memory mapping information to a map file; calling a user-defined function to modify the file head feature information of the So file, and erasing the file head feature information; and hiding the record of the So file in the shared object list so as to complete protection of the So file. According to the method for protecting the So file from being Dumped by the memory based on the Android system, the So file in the Android system can be effectively prevented from being illegally Dumped in the memory, and the running safety of an application program is protected. In addition, due to the fact that balance between safety and performance is considered in the implementation process, the scheme is suitable for Android devices for various commercial and personal purposes.

The invention relates to the technical field of computer compiling, and discloses a method and a device for simultaneously compiling multiple architectures, computer equipment and a storage medium. According to the method for simultaneously compiling the multiple architectures, the code files input by the user are processed through the user-defined linker, the multiple code files are analyzed, and therefore analysis operation in the compiling process in all the architectures can be advanced, and a unified intermediate file is generated. And continuing to compile the generated unified intermediate file in each architecture, and finally obtaining an executable file or a library file corresponding to each architecture. According to the embodiment of the invention, the analysis operation is advanced, and the unified intermediate file is generated, so that the analysis operation does not need to be executed for multiple times when compiling is continued under each framework, and the effects of shortening the compiling time and saving computing resources can be achieved.

The invention provides a standardized chip compiling link generation method and system, an electronic device and a medium, and the method comprises the steps: firstly carrying out the information extraction of a link file grammar rule and a command manual of a target chip, then carrying out the description based on the information extraction to form an xml specific text, and then generating a standard link file based on the xml specific text. According to the method, the link file required by the project can be simply, conveniently and efficiently generated, the generated standard link file is uniform in generation process and format and high in adaptability, and various configuration information in the image interface can be verified in the process, so that the correctness of user configuration is verified in real time, configuration defects can be effectively reduced, and the user experience is improved. In this way, the difference of the link files generated by different chip platforms and different compiling linkers is accurately and efficiently shielded, a user can freely configure the image interface within a specified range, complete link files can be generated, part of link files can also be generated, and the requirements of different items using the microcontroller are met.

The invention discloses a dynamic link call conversion method and device, and the method comprises the steps: when symbol analysis and binding are carried out on a first component, the first component is dynamically linked to a first symbol in a first dynamic link library, and the first symbol does not establish a dynamic link symbol binding relation with the first component; the dynamic linker generates a first table item for calling a conversion table if the first component is not in the first dynamic link library and the calling agreement used by the first component and the first dynamic link library is different, the first table item comprises a first instruction and a second instruction, and the first instruction is used for instructing to load a first address of a first symbol in a memory to a specified first storage container; the second instruction is used for indicating to jump to the calling converter; the dynamic linker fills a second table entry in the default GOT with a second address of the first table entry in the memory; and the default GOT belongs to the first component, so that the effect of call conversion of the cross-call agreement can be realized without manual intervention of a programmer or recompiling a program.

1. The name of the design product: joint. 2. The use of the design product: for pipe connection. 3. The design points of the design product: in shape. 4. The picture or photo that best shows the design points: perspective view.

The invention relates to a custom workflow architecture and plug-in system based on a large language model. The custom workflow architecture and plug-in system comprises a server and an interface interaction display device connected with the server, wherein the server carries a custom workflow architecture module and a plug-in module based on a large language model; the interface interaction display device can interact and display working interfaces of the custom workflow architecture module and the plug-in module; the user-defined workflow architecture module can call plug-ins in the plug-in module; the interface interaction display device can help a user to interact with the custom workflow architecture module in the form of a graphical draggable window, and is used for connecting a plurality of plug-ins in series according to the requirements of the user to form the custom workflow. According to the custom workflow architecture and plug-in system provided by the invention, the graphical drag linker is introduced, so that a user can freely combine and configure various plug-ins to construct personalized workflows.

The invention relates to the technical field of firmware updating, in particular to an embedded firmware compilation-free updating method which comprises the following steps: S1, firmware is divided into a plurality of independent function modules through a link script, and each function module is allocated to an independent memory address interval and recorded in a section table; s2, in response to the module replacement instruction, reading an identifier and a version number of a target function module; s3, positioning a target memory address of the target function module according to the section table, and executing compatibility check; s4, if the compatibility check is passed, writing binary data atoms of the new function module into a target memory address interval under the protection of a memory barrier; and S5, updating a module version mark in the section table, and triggering soft restart to enable the new function module to take effect. The firmware is divided into independent modules, the updating efficiency and flexibility of the firmware are improved, real-time loading and replacement of the firmware modules are supported, the flexibility and response speed of the system are improved, an automatic rollback mechanism is introduced, and the stability and safety of the system are guaranteed.

This invention provides a method for protecting So files from memory dumping in the Android system. The method includes: adjusting the memory mapping behavior of the `mmap` function in the Linker to prevent reporting So file memory mapping information to the maps file; calling a custom function to modify the file header characteristics of the So file and erasing the header characteristics; and hiding the So file record in the shared object list `solist`, thereby protecting the So file. This method effectively prevents So files from being illegally dumped in memory in the Android system, protecting the operational security of applications. Furthermore, because the implementation considers a balance between security and performance, this solution is applicable to various commercial and personal Android devices.

The application discloses a generation method of a software system for debugging. GN is used to generate a Ninja build file for a current software system, and a link response file is generated when the Ninja build file is required to build. Ninja is used as a build tool for the current software system, and the modified Ninja build file is used for building. A target path is newly created, and a linker script, a link response file, static library files and object files listed in the link response file in the current software system are copied to the target path. Absolute paths of all object files and static library files recorded in the link response file in the target path are updated. A CMake special configuration file is modified, and all directories and files in the target path constitute a software system for debugging. The application generates a simplified software system for debugging from an originally huge software system, and the copyright is protected.

1. The name of the design product: joint. 2. The use of the design product: used for air conditioning pipe penetration test integrated joint. 3. The design points of the design product: in shape. 4. The picture or photo that best indicates the design points: perspective view.

The present application discloses a detection method, device, equipment and storage medium for executable file injection, the method comprising: searching the memory information of the target process; detecting whether there is information of two or more dynamic linkers in the memory information of the target process; when the information of two or more dynamic linkers is detected, determining that the target process has been infected with a Trojan virus injected by a dynamically linked executable file. The above detection method provided by the present invention can detect in real time whether the memory of the target process has been injected with a Trojan virus of a "dynamically linked executable file", has strong pertinence for such Trojan viruses, does not require feature code data of the Trojan virus, has wide adaptability and high detection efficiency.

The invention discloses a safe function parameter transmission method based on static binding of a hierarchical structure body and an RAM (random access memory), which belongs to the field of embedded system software design and comprises the following steps: S1, constructing a hierarchical function special structure body type with verification parameters; s2, function parameter transfer optimization; s3, realizing data and code life cycle synchronous management through compiler instruction and link script forced binding; s4, through an XOR verification mechanism, improving the function parameter transfer security; by constructing a three-layer function proprietary structure type with verification parameters, optimizing memory layout, eliminating memory holes and adopting an XOR verification mechanism, the security and high efficiency of parameter transmission are ensured, and meanwhile, synchronous management of data and code life cycles is realized through compiler instructions and link scripts, so that the security and high efficiency of data transmission are improved. The fragmentation problem caused by dynamic memory allocation is avoided, and the stability and reliability of the system are further improved.

A system and method for determining the placement of software functions at link time is disclosed. The system utilizes special annotations that are included in software modules of the source code, which defines certain parameters associated with each function. These parameters may be referred to as code classification components, wherein each code classification component may include one or more code classes associated with that code classification component. These software modules are then compiled. A linker script is created based on the desired configuration. The linker then uses the linker script to determine which software modules should be placed in RAM for improved execution speed.

The invention discloses an embedded multi-user cooperation development method based on RTOS, and the method comprises the steps: a linker specifies a code segment of a code link, and the code segment comprises a peripheral module and a task module; defining a specific macro, putting the declaration function address into a specific code segment in the code segments by adopting the specific macro, and sorting; defining callback functions of the peripheral module and the task module in the main function; and compiling a driver of the peripheral module and / or a driver of the task module according to the preset task function demand information. When the driver of the peripheral module and the driver of the task module are compiled, only the driver is created in the own module, and the main function does not need to be directly modified, so that the conflict risk caused by intensively modifying the main function in a traditional development mode is avoided; different functions are not directly coupled, so that later-stage codes are easier to test, reuse and migrate, and meanwhile later-stage function expansion and debugging positioning are facilitated.

A device compiler and linker is configured to optimize program code of a co-processor enabled application by resolving generic memory access operations within that program code to target specific memory spaces. In situations where a generic memory access operation cannot be resolved and may target constant memory, constant variables associated with those generic memory access operations are transferred to reside in global memory.

A system for generating executable code of a software program that is matched with an intermediate representation (IR) of a source code of the software program. The system comprises a processor adapted for adding one or more annotation entries, each for a location in the IR, to program data in the IR. An internal annotation entry is generated for an internal location in the IR that is not referenced by an IR symbol in the global IR symbol table of the IR. The processor is further adapted for compiling the IR to produce a binary object comprising the annotation entries, and providing the binary object to a linker or to a dynamic loader to update in an executable object an executable internal annotation entry associated with an internal annotation entry to reference run-time location in the executable object.

1. Name of the product in this design: Connector (Y-type). 2. Purpose of this design: For connecting three pipes together. 3. The key design feature of this product is its shape. 4. The image or photograph that best illustrates the design's key points: 3D view 1.

The invention discloses a static pointer analysis-combined detection acceleration method and medium during memory safe operation, and the method comprises the steps: carrying out the preprocessing and analysis of a source code of a to-be-detected program through a compiler, collecting the metadata of an array variable, carrying out the intra-process alias analysis and the inter-process alias analysis, and obtaining a to-be-detected program; inserting code snippets used for transmitting metadata in a cross-process manner, rewriting array subscript expressions in codes, inserting code snippets used for border crossing detection, inserting runtime detection codes, compiling and linking instrumented source codes by using a compiler and a linker, and generating an executable file; and running the executable file, and outputting a detection result during safe running of the memory. According to the method, lightweight Boolean expression calculation is used for replacing heavy-weight runtime detection, the time overhead of a runtime detection tool can be effectively reduced on the premise that existing codes are not changed, missing report and false report are not introduced, and the time sequence of report errors and memory errors is guaranteed, and the method has practical application value.

The invention relates to an efficient linker design method based on multi-thread collaborative optimization. Firstly, dynamic task division and priority queue scheduling are adopted, the link process is decomposed into a plurality of task units capable of being executed in parallel, and the computing power of a multi-core processor is fully utilized. Secondly, a hierarchical symbol table is introduced, hot symbols are stored in a lockless hash table, cold data are stored in a read-write lock protected red-black tree, thread competition is effectively reduced, and efficient concurrent access is achieved; and meanwhile, a sectional relocation table and a progress counter supported by atomic operation are adopted, so that the concurrency performance is further improved. And finally, generating an intermediate file with a dependency label through a compiler, pre-obtaining a symbol dependency relationship and a dependency graph between modules, avoiding repeated analysis, and designing a dynamic feedback mechanism, so that the linker can feed back optimization data to the compiler to form a closed-loop optimization system. The method is suitable for large-scale projects and high-performance computing scenes, and the resource utilization rate is optimized while the link speed is increased.

The present invention discloses a method for locating the code running position before abnormal reset of MCU and MCU, belonging to the field of MCU abnormal detection. The method comprises the following steps: defining a storage area in the linker file of MCU for storing position information, wherein the storage area maintains the previous value after MCU reset and will not be cleared; at different positions of the original code, the corresponding position information is written into the storage area by setting the mark position interface; in the original code, the information in the storage area is read out by setting the sending position interface; when the MCU is abnormally reset, the code running position in the storage area before the abnormal reset of MCU is read out by calling the sending position interface. The present invention solves the difficulty of troubleshooting the abnormal reset problem of MCU in the development of embedded software for automobile controllers, and realizes the positioning of the code running position before the abnormal reset of MCU.

This application relates to the field of virtual machine technology, specifically providing a virtual machine and a method, apparatus, device, and medium for generating its loading file, aiming to solve the problem that applications can only support one programming language on limited hardware resources. To this end, the loading file generation method of this application includes: generating a target linker file for a first application programming interface based on a predefined loading file format and linker file format for the target virtual machine; generating a second application programming interface for at least one second programming language based on the target linker file; and compiling and converting a target application that calls the second application programming interface based on the second application programming interface and the target linker file to generate the loading file for the target virtual machine. This method supports program development in multiple programming languages, improving the freedom of language selection and development efficiency. Furthermore, the implementation of the application programming interface does not require maintaining multiple versions, simplifying the management and maintenance of the interface source code.

The application discloses an API granularity-based shared library deflation method and system, which comprises the following steps: clustering page-aligned dependent clusters by analyzing the function dependence of each exported API offline, and rewriting the binary layout; intercepting API calls by a customized dynamic linker at runtime, dynamically adjusting the code page execution authority in combination with metadata, and activating only the required page of the current API; the scheme can maintain the cross-process memory sharing of the shared library, avoid memory inflation caused by copy-on-write (CoW), reduce the number of available gadgets by more than 90%, and significantly improve the ROP / JOP attack resistance; the system supports multithreading safety, hot API optimization, is compatible with the standard ELF format, does not need to modify the application, is transparent in deployment, and is suitable for Linux high-security and high-density running environments; the application can maintain the cross-process memory sharing advantage of the shared library while significantly reducing the attack surface and memory inflation problem.

The invention provides a code compiling method and a compiler tool chain, the compiler tool chain comprises a compiler preprocessing module, a macro definition controller, a code generator and a linker, and the method comprises the steps that the compiler preprocessing module determines hardware feature parameters corresponding to a target processor from an instruction set configuration file corresponding to the target processor; the macro definition controller performs conflict check on the hardware feature parameters based on the hardware feature constraint table; under the condition that the hardware feature parameters have conflicts, adjusting the hardware feature parameters to obtain target hardware feature parameters, and generating a conditional compiling macro set based on the target hardware feature parameters; logic dependency rules among the hardware feature parameters are defined in the hardware feature constraint table; the code generator carries out conditional compiling on the to-be-compiled function body based on the conditional compiling macro set, and a compiled target file corresponding to the target processor is generated; and the linker generates an executable function mirror image corresponding to the target processor based on the target file.

A data processing system includes a data processing arrangement, wherein the data processing arrangement includes computing hardware for executing one or more software products, wherein execution of the one or more software products configures the data processing arrangement to access data from a file system arrangement. The data processing arrangement is operable to load a dynamic linker that is operable to include an intercept library that intercepts file access operations of an executable software product wherein: (i) a virtual file that does not exist on the file system arrangement becomes accessible to the executable software product; (ii) the virtual file is a result of either (a) a just-in-time translation of one or more real files of the file system arrangement, wherein the just-in-time translation is made from one file format to another file format, or (b) conversion of the access operation to an equivalent cloud object-storage access operation(s) on a real object located on the cloud object-storage, or (c) a combination of the just-in-time translation of (a) with the object access conversion from (b). Optionally, at least one of: (iii) the virtual file is a different file format to the real file / object, wherein a compressed file format and the virtual file are mutually different file formats; and (iv) the file formats are genomic file formats.

The invention discloses a program code optimization method and device in a link stage, equipment and a storage medium, and the method comprises the steps: traversing each target file input into a linker, and obtaining a program section in each target file; if the program section is a clustering base point function, creating a kernel clustering instance corresponding to the clustering base point function, and executing clustering optimization operation on the clustering base point function according to the kernel clustering instance; and after the clustering base point functions in all the target files complete the clustering optimization operation, executing a linking operation on each target file. According to the technical scheme, the feasibility of the code optimization method can be improved, the influence of instruction cache deletion is eliminated, and the performance of an executable program is greatly improved.

The utility model relates to a linker plugging test machine which comprises a base, a locking mechanism arranged on the base, a vertical plate and a test mechanism arranged on the vertical plate, the locking mechanism comprises a transverse sliding rail, a transverse sliding seat, a transverse air cylinder, an ejector block and an ejector block, and the test mechanism comprises a lifting air cylinder, a lifting seat, a tension sensor and a pin seat. According to the linker plugging testing machine, the locking mechanism is matched with the testing mechanism, so that positioning clamping and plugging force testing of linkers of various models can be realized, the linkers cannot be damaged by clamping, the testing precision is high, and the product quality is ensured.