Method for Uniformly Coating Insulation Layer on Inner Wall of TSV
A technology of through-silicon vias and insulating layers, applied in the field of wafer-level chip size packaging technology, can solve the problems of high price, difficult spraying method, high temperature of inorganic insulation process, etc., and achieve the effect of improving uniformity and saving equipment cost
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[0028] Such as figure 1 As shown, a method for evenly coating the inner wall of a through-silicon via with an insulating layer, the steps are as follows:
[0029] a. Provide a wafer to be coated with micron-scale TSVs with an aspect ratio greater than or equal to 2:1 and a spin coating machine, place the wafer on the working platform of the spin coating machine, and Make the orifice of the TSV on the wafer surface upward; during specific implementation, place the wafer to be coated containing the TSV with the orifice upward on the working platform of the rotary coating machine, and turn on the vacuum adsorption to ensure No slippage during wafer rotation. Among them, the spin coating machine is a commonly used spin coating equipment in the prior art; through-silicon vias refer to through-silicon vias on the order of microns and with an aspect ratio greater than or equal to 2:1, which are used for conduction on the back of the chip metal PIN. .
[0030] b. Add a certain amou...
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