Method for evenly coating silicon through hole inner wall with insulation layer

Abstract

The invention discloses a method for coating a silicon through hole inner wall with an insulation layer. The surface of a wafer and the interior of a silicon through hole are cleaned through a cleaning process; the surface of the wafer and the interior of the silicon through hole are rotationally coated with an organic solvent capable of dissolving high-performance polymer materials in advance, then the surface of the wafer and the interior of the silicon through hole are rotationally coated with high-temperature polymer materials, and the high-performance polymer materials are evenly diffused under the effect of the organic solvent, so that the silicon through hole side wall is evenly coated with the insulation layer. According to the method, the wafer surface and the wafer silicon through hole side wall and bottom can be evenly coated with the insulation layer on standard rotary coating equipment through the general technology at normal temperature, the micron dimension silicon through hole three-dimensional even coating is achieved, the equipment cost is greatly saved, the uniformity of the silicon through hole insulation layer is improved, and binding force between the insulation layer and materials making contact with the insulation layer is improved.

Description

technical field [0001] The invention relates to the technical field of wafer level chip scale packaging (WLCSP) of semiconductor chips, in particular to a method for uniformly coating the inner wall of a through silicon hole with an insulating layer. Background technique [0002] Wafer level chip scale packaging (WLCSP) is a kind of IC packaging method, which is a packaging method in which a whole wafer is packaged first, and then a single chip is obtained by cutting. Through silicon via technology is used to expose the pins on the front side of the metal chip, that is, the PIN pins, from the back side of the wafer, and then electrically lead them to the back side of the wafer. The electrical transmission distance of the chip increases the speed of the chip and reduces the power. [0003] Before drawing out the metal lines, the inner wall of the TSV needs to be insulated to ensure the stability of the electrical interconnection. At present, the plasma-enhanced chemical vap...

AI Technical Summary

Problems solved by technology

At present, the TSV industry generally uses plasma-enhanced chemical vapor deposition (PECVD) equipment to achieve the coating of the inorganic insulating layer, but PECVD equipment is expensive, and the temperature of the inorganic insulation process is relatively high, which is not suitable for the process temperature required by the image sensor. Technical indicators below 200 degrees

However, the existing commonly used spin coating equipment has strict requirements on the viscosity of insulating materials, and the spraying method is difficult to ensure that the entire inner wall of the TSV can be coated evenly to achieve good insulation.

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