Embedded Folded Gate Saddle Insulated Tunneling Enhanced Transistor and Manufacturing Method
A saddle-shaped, transistor technology, used in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of large gate-induced source, no improvement in parasitic capacitance characteristics, shortened distance, etc., and achieve low parasitic capacitance characteristics. Effect
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[0102] Below in conjunction with accompanying drawing, the present invention will be further described: figure 1 A three-dimensional structural schematic diagram after stripping off the emitter 9, the collector 10 and the blocking insulating layer 11 for the embedded folded gate saddle-shaped insulating tunneling enhancement transistor of the present invention; figure 2 A three-dimensional structural schematic diagram after stripping off the emitter 9, the collector 10, the blocking insulating layer 11, the emitter region 3, the base region 4 and the collector region 5 for the embedded folded gate saddle-shaped insulation tunneling enhancement transistor of the present invention; image 3 The three-dimensional structure after the emitter 9, the collector 10, the blocking insulating layer 11, the emitter region 3, the base region 4, the collector region 5 and the saddle-shaped conductive layer 6 are removed for the embedded folded gate saddle-shaped insulating tunneling enhance...
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