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Embedded Folded Gate Saddle Insulated Tunneling Enhanced Transistor and Manufacturing Method

A saddle-shaped, transistor technology, used in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of large gate-induced source, no improvement in parasitic capacitance characteristics, shortened distance, etc., and achieve low parasitic capacitance characteristics. Effect

Inactive Publication Date: 2017-07-21
SHENYANG POLYTECHNIC UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although the degradation of this device performance can be alleviated by improving the structure of the gate electrode, when the device size is further reduced, the switching characteristics of the device will continue to deteriorate
[0006] Compared with MOSFETs, tunneling field effect transistors (TFETs) proposed in recent years have improved their average subthreshold swing, but their forward current is too small, and the characteristics of parasitic capacitance generated under the same size are not the same. improve
[0007] In addition, TFETs can be generated as the tunneling part of TFETs by introducing materials with narrower band gaps such as compound semiconductors, silicon germanium, or germanium, which can increase the tunneling probability to improve switching characteristics, but increases the difficulty of the process.
Using a high dielectric constant insulating material as the insulating dielectric layer between the gate and the substrate can improve the control ability of the gate to the electric field distribution of the channel, but it cannot essentially increase the tunneling probability of silicon materials. Therefore, for TFETs The forward conduction characteristic of the improvement is very limited
[0008] In addition, since both TFETs and MOSFETs control the electric field, potential and carrier distribution inside the gate insulating layer and semiconductor through the electric field effect of the gate electrode, in order to improve the control ability of the gate electrode to the inside of the semiconductor, high dielectric The constant and thinning gate insulating layer strengthens the control ability of the gate electrode, but at the same time shortens the distance between the gate electrode and the drain region, the gate electrode and the source region, so that the overlapping area of ​​the gate electrode and the drain electrode is at the gate electrode Larger gate-induced-drain leakage (GIDL) or gate-induced-source leakage (GISL) currents are generated when extremely reverse biased

Method used

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  • Embedded Folded Gate Saddle Insulated Tunneling Enhanced Transistor and Manufacturing Method
  • Embedded Folded Gate Saddle Insulated Tunneling Enhanced Transistor and Manufacturing Method
  • Embedded Folded Gate Saddle Insulated Tunneling Enhanced Transistor and Manufacturing Method

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Embodiment Construction

[0102] Below in conjunction with accompanying drawing, the present invention will be further described: figure 1 A three-dimensional structural schematic diagram after stripping off the emitter 9, the collector 10 and the blocking insulating layer 11 for the embedded folded gate saddle-shaped insulating tunneling enhancement transistor of the present invention; figure 2 A three-dimensional structural schematic diagram after stripping off the emitter 9, the collector 10, the blocking insulating layer 11, the emitter region 3, the base region 4 and the collector region 5 for the embedded folded gate saddle-shaped insulation tunneling enhancement transistor of the present invention; image 3 The three-dimensional structure after the emitter 9, the collector 10, the blocking insulating layer 11, the emitter region 3, the base region 4, the collector region 5 and the saddle-shaped conductive layer 6 are removed for the embedded folded gate saddle-shaped insulating tunneling enhance...

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Abstract

The invention relates to an insulated folded gate saddle-shaped insulation tunneling enhanced transistor, which has the advantages of low parasitic capacitance and low reverse leakage current compared with MOSFETs or TFETs devices of the same size. Excellent switching characteristics are achieved by using the extremely sensitive relationship between the impedance of the tunneling insulating layer and its internal field strength; the excellent forward conduction characteristics are achieved by enhancing the tunneling signal through the emitter; in addition, the present invention also proposes an embedded folding The specific manufacturing method of gate saddle-shaped insulating tunneling enhanced transistor unit and its array. The transistor significantly improves the working characteristics of the nanoscale integrated circuit unit and is suitable for popularization and application.

Description

[0001] Technical field: [0002] The invention relates to the field of ultra-large-scale integrated circuit manufacturing, and relates to a structure and a manufacturing method of an embedded folded-gate saddle-shaped insulation tunneling enhancement transistor suitable for manufacturing high-performance ultra-high-integrated integrated circuits. [0003] Background technique: [0004] Currently, as the device size of metal-oxide-semiconductor field-effect transistors (MOSFETs), the basic unit of integrated circuits, continues to shrink, the distance between the drain electrode and the gate electrode, or the distance between the source electrode and the gate electrode, is also continuously reduced. Small, this will significantly increase the gate-source, source-gate, gate-drain and drain-gate parasitic capacitance of the device, increase the power consumption of the integrated circuit, increase the propagation delay and negative feedback of the signal, and affect the gain-bandwi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/739H01L29/423H01L29/10H01L21/28H01L21/331
CPCH01L21/28H01L29/10H01L29/4232H01L29/66477H01L29/78
Inventor 靳晓诗吴美乐刘溪揣荣岩
Owner SHENYANG POLYTECHNIC UNIV
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