Design method of randomized fault-resistant attack measures for reconfigurable array architecture

Abstract

The invention relates to a design method of randomized anti-fault-attack measures for reconfigurable array architecture. The method comprises the steps that firstly, the reconfigurable array architecture is provided, and a specific mapped data flow diagram of an encryption algorithm is obtained; secondly, expense ratio constraint conditions and anti-fault-attack capacity are preset; thirdly, expense generated in executing the encryption algorithm is calculated; fourthly, the sensitive point distribution, time search range and space search range of the encryption algorithm are determined; fifthly, time randomness and space randomness are preset, and corresponding sensitive point distribution, a corresponding time search range and a corresponding space search range are determined; sixthly, anti-fault-attack capacity is calculated and matched with the preset anti-fault-attack capacity; seventhly, an actual extra expense ratio is determined, and the preset time randomness and space randomness are adjusted to be matched with the preset expense ratio constraint conditions. The method can provide the basis for designing the randomized anti-fault-attack measures and effectively improve security.

Description

technical field [0001] The invention relates to a design method, in particular to a design method of a randomization anti-fault attack measure oriented to a reconfigurable array architecture, and belongs to the technical field of integrated circuit security. Background technique [0002] With the continuous deepening of the degree of social informatization, people's requirements for information security are also increasing, and information security has become an indispensable thing. The cryptographic processor is a key component to ensure information security. The continuous improvement of the encryption algorithm ensures the security of the cryptographic algorithm at the mathematical level. The security of the cryptographic processor has been greatly tested, and the fault injection attack can actively control the generation of the ciphertext, which poses a great threat to the information security. [0003] The fault injection (disturbance) attack refers to perturbing the c...

AI Technical Summary

Problems solved by technology

[0005] Due to the gradual improvement of fault injection accuracy represented by lasers, double-fault or multiple-fault attacks are possible, and traditional redundancy countermeasures cannot resist such attacks

Taking hardware redundancy countermeasures as an example, if an attacker injects the same fault into two sets of computing circuits (normal execution circuit and redundant circuit) at the same time, the fault detection mechanism will fail, posing a threat to hardware security.

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