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Operational Amplifier

An operational amplifier, amplifying path technology, applied in amplifiers, differential amplifiers, DC-coupled DC amplifiers, etc., can solve the problems of reducing input-to-transconductance, small DC path, slow DC operating point settling time, etc., to achieve good small signal characteristics, the effect of accelerating large signal response

Active Publication Date: 2017-06-06
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Both large-signal response and small-signal characteristics are one of the important indicators of operational amplifiers. figure 1 In the structure shown, there is a compromise relationship between the large-signal response and the small-signal characteristics. In order to meet the small-signal characteristics, it is often necessary to reduce the transconductance of the input pair, which will make the DC path of the existing operational amplifier relatively complex. Small, when a large signal jump occurs at the input of the op amp, there will be a problem of slow settling time of the DC operating point

Method used

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Embodiment Construction

[0017] Such as figure 2 Shown is the circuit diagram of the operational amplifier of the embodiment of the present invention; the operational amplifier of the embodiment of the present invention includes: a cascode amplifier circuit, a tail current source, and a cascode current source load; the cascode amplifier circuit is divided into Symmetrical first and second amplification paths.

[0018] The cascode amplifier circuit includes an input pair of transistors and a cross pair of transistors.

[0019] The input pair of transistors includes a symmetrical first MOS transistor M1 and a second MOS transistor M2, and the cross pair of transistors includes a symmetrical third MOS transistor M3 and a fourth MOS transistor M4.

[0020] The gate of the first MOS transistor M1 and the gate of the second MOS transistor M2 are respectively connected to one of the differential input signals INP and INN, figure 2 The middle signal INP is connected to the gate of the first MOS transistor...

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Abstract

The invention discloses an operational amplifier. The operational amplifier comprises a cascode amplifying circuit, a tail current source and a cascode current source load. The cascode amplifying circuit is divided into a first amplifying route and a second amplifying route which are symmetrical and comprises an input pipe pair and an intersection pipe pair, wherein the input pipe pair comprises a first MOS pipe and a second MOS pipe which are symmetrical, the intersection pipe pair comprises a third MOS pipe and a fourth MOS pipe which are symmetrical, the grid electrode of the first MOS pipe and the gird electrode of the second MOS pipe are each connected with one of difference input signals, the grid electrode of the third MOS pipe is connected with the grid electrode of the first MOS pipe, the grid electrode of the fourth MOS pipe is connected with the grid electrode of the second MOS pipe, the drain electrode of the first MOS pipe is connected with the first amplifying route, the drain electrode of the second MOS pipe is connected with the second amplifying route, the drain electrode of the third MOS pipe is connected with the drain electrode of the second MOS pipe, and the drain electrode of the fourth MOS pipe is connected with the drain electrode of the first MOS pipe. The operational amplifier can amplify signal response and also keep a good small signal characteristic.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit, in particular to an operational amplifier. Background technique [0002] Operational Amplifier (Operational Amplifier) ​​is widely used in integrated circuits; such as figure 1 Shown is the circuit diagram of the existing operational amplifier; figure 1 The existing operational amplifier shown includes NMOS transistors MN1, MN2, MN3 and MN4 to form a cascode amplifier circuit, and the NMOS transistors MN1 and MN2 are used as a pair of input pair transistors and are connected to a pair of differential input signals INP and INN from the gate; The gate of the NMOS transistor MN0 is connected to the bias voltage VB1, and the source and drain are connected between the source of the NMOS transistor MN1 and the ground to provide a tail current source; the PMOS transistors MP1, MP2, MP3 and MP4 are used as cascode current sources. The load is connected between the power supply voltage VDD and the c...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03F3/45
CPCH03F3/45192H03F2203/45028H03F2203/45052H03F2203/45062H03F2203/45126
Inventor 邵博闻
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP