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A method for manufacturing through-silicon vias

A manufacturing method and TSV technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., to solve metal wire drawing problems, improve thickness stability, and improve process fluctuations

Active Publication Date: 2018-06-19
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The technical problem to be solved by the present invention is to provide a TSV manufacturing method to improve the process fluctuations in the TSV thinning process, improve the thickness stability between silicon wafers, and at the same time solve the wire drawing problem of the TSV filling metal in the grinding process

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  • A method for manufacturing through-silicon vias
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  • A method for manufacturing through-silicon vias

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Embodiment Construction

[0023] The present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments.

[0024] In order to have a more specific understanding of the technical content, characteristics and effects of the present invention, several specific examples of this patent are now described in detail in conjunction with the illustrated embodiment:

[0025] Such as Figure 1A-Figure 1E As shown, a method for manufacturing TSVs of the present invention includes the following steps:

[0026] 1. If Figure 1A As shown, a through-silicon via 2 (TSV) pattern is formed on a silicon substrate 1 , the depth is generally between 30 μm-150 μm, and the critical dimension is between 2 μm-20 μm.

[0027] 2. If Figure 1B As shown, a grinding heterogeneity 3 is formed at the bottom of the TSV 2 , and the formation method will be described in detail later.

[0028] 3. If Figure 1C As shown, the TSV medium 4 is filled, such as doped polysilicon or meta...

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Abstract

The invention discloses a production method of through Si via (TSV). The production method includes: step 1, providing a semiconductor silicon substrate with a front face and a back face, and forming a TSV pattern in the front face of the silicon substrate; step 2, forming a grinding heterogeneous medium at the bottom of the TSV; step 3, filling and flattening the TSV; step 4, completing a prior device process and a later line connection process, performing a grinding thinning process on the back face of silicon substrate, stopping the thinning process or performing excessive grinding by a certain quantity after the thinning process touches the grinding heterogeneous medium, and performing excessive grinding on portions needed to be reversed; step 5, removing the grinding heterogeneous medium, and adjusting the projection height or recession height of the TSV. By the production method, process fluctuation in the TSV thinning process can be improved, thickness reliability among silicone substrates can be also improved, and the problem of wiredrawing of TSV filling metal during grinding can be solved.

Description

technical field [0001] The invention relates to a manufacturing process of a semiconductor integrated circuit, in particular to a manufacturing method of a through-silicon via (TSV). Background technique [0002] With the evolution of electronic products to be lighter and thinner, the area of ​​the chip is getting smaller and smaller, and the thickness of the package is getting thinner and thinner. The 3D package based on TSV (Through Si via) can solve this problem. In order to improve the performance of TSV, the depth of TSV needs to be as small as possible. The benefits it brings are shortened process time, reduced filling difficulty, reduced parasitic inductance and resistance, and further reduced package size. But the challenge is the increased difficulty of the thinning process. [0003] For the Via first or Via middle process steps, TSV etching and TSV filling are performed before the thinning process of the silicon wafer. After the metal filling process and the entir...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768
CPCH01L21/76898
Inventor 刘鹏
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP