Unsealing method of chip package

A chip packaging and packaging technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as chip and lead damage, and achieve the effect of improving and avoiding damage.

Active Publication Date: 2018-06-08
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of this application is to provide a method for unsealing a chip package to solve the problem of damage to chips and leads during the unsealing process in the prior art

Method used

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  • Unsealing method of chip package
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  • Unsealing method of chip package

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0044] A plasma etching machine with the model Plasma lab80plus was used as the dry etching device. The excitation power of the plasma etching machine was set to 1000W, the bias voltage was 500V, and the etching gas was Ar and 5:2 in volume ratio. O 2 , the pressure of the etching gas is 100mT, the flow rate is 1000sccm, the etching time is 20min, and the etching rate is about 25μm / min. The thickness of the etched plastic sealing material layer is calculated by the etching rate and etching time. The top surface of the etched plastic material layer is 20 μm away from the highest point of the lead.

[0045] The chemical wet etching is carried out by using the unsealing device disclosed in the patent application with the application number of 200910056017.8, wherein the etching solution adopts a mixed acid solution composed of fuming nitric acid and 98% sulfuric acid in a volume ratio of 1:1, and the etching temperature is After 500s at 35° C., the top surface of the chip was ex...

Embodiment 2

[0047] A plasma etching machine with the model Plasma lab80plus was used as the dry etching device. The excitation power of the plasma etching machine was set to 1500W, the bias voltage was 100V, and the etching gas was Ar and 6:3 in volume ratio. O2, the pressure of the etching gas is 200mT, the flow rate is 800sccm, the etching time is 25min, and the etching rate is about 22μm / min. The thickness of the etched plastic sealant layer is calculated by the etching rate and etching time. The top surface of the etched plastic material layer is 12 μm away from the highest point of the lead.

[0048] Chemical wet etching is carried out by using the unsealing device disclosed in the patent application with the application number of 200910056017.8, wherein the etching solution adopts a mixed acid solution composed of fuming nitric acid and 98% sulfuric acid with a volume ratio of 1:3, and the etching temperature is The top surface of the chip was exposed after 500 s at 40° C., and was ...

Embodiment 3

[0050] A plasma etching machine with model Plasma lab80plus was used as the dry etching device. The excitation power of the plasma etching machine was set to 600W, the bias voltage was 800V, and the etching gas was Ar and 4:1 in volume ratio. O2, the pressure of the etching gas is 50mT, the flow rate is 1500sccm, the etching time is 15min, and the etching rate is about 30μm / min. The thickness of the etched plastic sealing material layer is calculated by the etching rate and etching time. The top surface of the etched plastic material layer is 30 μm away from the highest point of the lead.

[0051] Chemical wet etching is carried out by using the unsealing device disclosed in the patent application with the application number of 200910056017.8, wherein the etching solution adopts a mixed acid solution composed of fuming nitric acid and 98% sulfuric acid with a volume ratio of 1:2, and the etching temperature is After 600 s at 30° C., the top surface of the chip was exposed and ...

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PUM

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Abstract

The present application provides a method for unsealing a chip package. The chip package includes a plastic packaging material layer, leads and chips, and the unsealing method includes: adopting dry etching to thin the plastic packaging material layer on the upper surface of the chip package body to obtain a pre-opened package body; performing chemical wet etching on the pre-opened package body etch until the top surface of the chip is exposed. On the one hand, the unsealing method of the present application avoids the strong etching of too much chemical wet etching solution in the prior art, causing excessive corrosion to chips and leads; The anisotropic etching of the plastic packaging material layer can realize the precise etching of the plastic packaging material layer. Therefore, the combination of the two avoids the damage to the chip and the lead wire during the unsealing process, and improves the unsealing effect.

Description

technical field [0001] The present application relates to the technical field of semiconductor manufacturing, and in particular, to a method for unsealing a chip package. Background technique [0002] After the main functional devices of the chip are fabricated, the chip needs to be packaged to form a chip package. At present, the commonly used encapsulant is epoxy molding compound. Epoxy molding compound uses epoxy resin as matrix resin, phenolic resin as curing agent, plus some fillers, such as fillers, flame retardants, colorants, coupling Under the action of heat and curing agent, the epoxy ring-opening of epoxy resin reacts with phenolic resin, resulting in cross-linking and curing, making it a thermosetting plastic. The formed chip package generally has such as figure 2 In the shown structure, the plastic compound layer 10 of the package body is encapsulated with the chip 30 and the leads 20 . Since the leads inside the chip package may be short-circuited or open in...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/00
Inventor 殷原梓高保林张菲菲
Owner SEMICON MFG INT (SHANGHAI) CORP
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