Dynamic voltage adjustment device and method

Abstract

The invention discloses a dynamic voltage adjusting device and method. The device and the method are used for dynamic adjustment of supply voltage of a power source area of a chip. The device comprises a DVS load voltage storer, a DVS control module, a digital-to-analogue conversion module and a comparator module, wherein the DVS load voltage storer stores voltage value that each load grade corresponds to in the power source area; the DVS control module is used for obtaining load grades of the power source area, and the corresponding voltage values are obtained from the DVS load voltage storer according to the obtained load grades of the power source area; the digital-to-analogue conversion module performs digital-to-analogue conversion on the voltage values that are obtained by the DVS control module to generate simulated reference voltage of the power source area; the comparator module compares the simulated reference voltage of the power source area with the supply voltage of the power source area to generate a voltage difference value of the power source area, and the voltage difference value is sent to a power management integrated circuit (PMIC) to adjust the supply voltage of the power source area. By means of the dynamic voltage adjusting device and method, the DVS control efficiency can be effectively increased, and meanwhile, chip pins occupied by controlling can be reduced.

Description

technical field [0001] The invention relates to embedded system power management technology, in particular to embedded system chip dynamic voltage adjustment technology. Background technique [0002] Dynamic Voltage Scaling (DVS for short) is a technology that dynamically adjusts the voltage of each power supply domain of the chip according to the load conditions of each power supply domain of the chip. Supply voltage for each power domain. [0003] In embedded devices, a power management integrated circuit (PMIC for short) is usually used to supply power to each power domain of the chip. The DVS control method commonly used in the prior art is: [0004] 1) Integrated circuit bus (abbreviation, I2C) control: [0005] Such as figure 1 As shown, the chip and the PMIC are connected through I2C, and the PMIC provides a power supply voltage for the power domain through a DC-DC converter (BUCK for short). The PMIC usually includes multiple BUCKs, and each BUCK corresponds to a ...

AI Technical Summary

Problems solved by technology

When the number of DVS voltage levels is large and / or the number of power domains is large, a large number of GPIO signal lines of the chip will be occupied, and the control pins between the chip and the PMIC will be increased, resulting in an increase in the chip package PAD, resulting in an increase in the chip area

Images