68results about How to "Reduce signal lines" patented technology

From a pixel array where imaging pixels are arranged, pixel signals of respective columns on a selected row are read in parallel in a horizontal blanking period of a horizontal period. The pixel signals of the respective columns are output to horizontal signal lines in an effective period of the horizontal period via charge integrating amps provided respectively for the columns, i.e., provided respectively for vertical signal lines, and are thereby transferred horizontally. In the charge integrating amps, it is possible to enter a standby state while holding the pixel signals by a holding voltage. Furthermore, in the charge integrating amps, a reference potential for precharging feedback capacitors for amps at the time of a reading operation is automatically controlled based on a black level. Furthermore, pixel signals from the respective charge integrating amps are horizontally transferred in parallel using a plurality of horizontal signal lines.

The present invention relates to a display, a timing controller and a column driver IC, and more particularly to a display, timing controller and column driver integrated circuit using clock embedded multi-level signaling. The present invention provides a timing controller including a transmitter for transmitting a transmission signal wherein a transmission clock signal is embedded therein between a transmission data signal to have a signal magnitude different from that of the transmission data signal. The present invention also provides a column driver integrated circuit including a receiving unit for separating a clock signal from a received signal using a magnitude of the received signal, and for performing a sampling of a received data signal from the received signal using the separated clock signal.

A shift register unit, a gate driving circuit, and a display device are disclosed. The shift register unit comprising: a pull-up module for pulling up level signal at present-stage signal output based on a signal at a pull-up control node and a first clock input; a control module connected to a first voltage terminal and a second voltage terminal for controlling the level at the pull-up control node based on a signal inputted to a first signal input and a second clock input; and a reset module for resetting the level signal outputted from the present-stage signal output based on a signal inputted to a second signal input. Signal lines and TFTs integrated in the shift register unit may be reduced, thereby saving space occupied by the circuit and reducing product cost.

Disclosed are a pixel compensation circuit and a drive method thereof, an array substrate and a display device. The pixel compensation circuit comprises a reset module (201), a drive module (202), a compensation module (203) and a light-emitting control module (204); the reset module (201) is connected with a reset signal line and the drive module, and is configured to reset the drive module according to a reset signal input by the reset signal line; the drive module (202) is configured to output a drive current to drive light-emitting display of a display device; the compensation module (203) is connected with a signal control line, a data line and the drive module, and is configured to perform threshold voltage compensation and data write-in for the drive module under the control of a signal control signal input by the signal control line; and the light-emitting control module (204) is connected with a light-emitting control line, the drive module and the anode of the display device, and is configured to control the drive module to drive the light-emitting display of the display device according to a light-emitting control signal input by the light-emitting control line. The pixel compensation circuit can effectively prevent an influence of a threshold voltage on a drive current, and the pixel compensation circuit has less signal lines so that the fact that the pixel compensation circuit is used in mask design of a TFT substrate in a high-resolution display screen is facilitated.

A display device module that can supply high-speed signals with low distortion and drive high-load signal lines at high speed. A switch unit rearranges multiple input signals in accordance with switching control signals and inputs them to an internal circuit, as well as multiple source drivers, are arranged that have an internal processing circuit that generates drive signals based on the prescribed signal processing according to the output signals of the switch unit, switching control signals of different levels are supplied to odd- and even-numbered source drivers, the signal lines that transmit the multiple input signals are wired on the substrate so as to be parallel to each other without intersecting, and the input signals are supplied to the respective source drivers, thus making it possible to shorten the branching lines between the input signal lines and the input terminals of the source drivers, suppress the reflection of signals, and suppress the distortion of signal waveforms.

In a printhead in which a plurality of printing elements arranged in a predetermined direction and a driving circuit for driving the printing elements are formed on a single substrate, the printing elements are classified into a plurality of groups. A selection circuit for selecting a printing element to be driven in each group, and data supply circuits for supplying driving data to the driving circuit for driving each printing element through any of a plurality of paths are arranged on the substrate. This realizes high-speed operation while suppressing increases in wiring length and substrate area even upon an increase in the number of printing elements and reducing the cost and generation of malfunctions.

A keyboard set includes a keyboard unit, and a micro projector. The keyboard unit has a first housing, a video signal port and a first lock structure. The video signal port and the first lock structure are disposed in the first housing. The micro projector has a second housing, a signal line, and a second lock structure. The signal line is connected to the video signal port of the keyboard unit. The second lock structure is disposed on the second housing, and capable of combining with the first lock structure, for the micro projector to be fixed to the keyboard unit.

A GOA circuit and a liquid crystal device (LCD) are disclosed. The GOA circuit includes a plurality of GOA units and a control module. Each of the cascaded GOA units is configured for charging corresponding horizontal scanning lines within a display area when being driven by a first level clock, a second level clock, a first control clock, and a second control clock. After the horizontal scanning lines are fully charged by the GOA circuit, the control module is configured for resetting the gate driving signals to be at the first level, i.e., the invalid level, via the turn-on pulse signals and the negative-voltage constant-voltage source.

An apparatus is provided comprising a control chip, at least one peripheral chip connected to the control chip via a bus, the bus comprising a plurality of signal lines, and a control circuit coupled to each signal line of the bus. Each control circuit comprises a comparator for comparing voltage on the signal line with a reference voltage, and a driver connected to the comparator, for supplying power to the signal line, the driver being arranged to increase power supplied to the signal line if the voltage on the signal line is less than the reference voltage, the greater the difference between the voltage on the signal line and the reference voltage, the greater the increase in power supplied to the signal line, and to decrease power supplied to the signal line if the voltage on the signal line is greater than the reference voltage, the greater the difference between the voltage on the signal line and the reference voltage, the greater the decrease in power supplied to the signal line. There is also provided a method for monitoring each signal line of a bus connecting a control chip with at least one peripheral chip.

The object of the present invention is to provide an elastic wave filter capable of suppressing deterioration of a pass band and realizing to downsize. In the elastic wave filter of the present invention provided with a circuit, to which elastic wave resonators of a first series arm, a second series arm and a parallel wave are connected, the first series arm and one out of the second series arm and the parallel arm are arranged in the lateral direction in a row to be adjacent to each other, and the other out of the second series arm and the parallel arm is disposed on the rear side of the row, and prescribed bus bars in the first series arm, the second series arm and the parallel arm are arranged on the common connection point side.

There is provided a technology that can reduce the number of signal lines by encoding a PWM signal used in a display driver IC. The display driver circuit for displaying a gradation on a display screen based on a PWM signal includes a PWM signal generator for generating a PWM signal, a PWM encoder for encoding the PWM signal generated from the PWM signal generator, a PWM decoder for decoding the encoded PWM signal into the PWM signal, a switching unit for selectively outputting the PWM signal generated from the PWM decoder, a data storage unit for storing a display data used to switch the switching unit, and an SRAM decoder for outputting an on/off signal to the switching unit according to the display data outputted from the data storage unit.

An integrated circuit, preferably for controlling vehicle functions, having an analog-digital converter for converting an analog signal into digital measurement values, a DSP unit, connected downstream from the analog-digital converter, for pre-processing the digital measurement values, a central computing unit, connected to the DSP unit so as to transmit data, for further processing of the digital measurement values, the DSP unit being set up to control the analog-digital converter during operation.

A dual tuner is described that includes a rectangular parallelepiped casing having four side plates, partitions for dividing inside of the casing into a plurality of areas, a coaxial connector fitted to one side plate of the casing, and a circuit board mounted in the casing. Both a data tuner and a video tuner are divided by the partitions. The signal line of the data tuner which has severe spurious interference standard requirements, is set noticeably shorter than the signal line of the video tuner whose spurious interference standard requirements are not so severe.

A read operation for a memory device. In response to an input address indicating to read data from a different page, a selected word line, first and second global bit lines and a selected first bit line group are precharged. A first cell current flowing through the selected word line, the first and the selected first bit line groups is generated. A first reference current flowing through the second global bit line group is generated. A first half page data is read based on the first cell current and the first reference current. The selected word line, the first and the second global bit lines are kept precharged. A second cell current flowing through the selected word line is generated. A second reference current is generated. A second half page data is read based on the second cell current and the second reference current.

An information input device includes a plurality of sensors arranged for an operation surface at predetermined intervals, each sensor detecting contact of an operation object with the operation surface in a vicinity of the sensor and outputting a detection signal. An input sensing judgment unit determines whether an input of the operation object is sensed based on an integrated detection signal of the plurality of sensors. A sensor group selection unit selects a sensor group including sensors having sensed the operation object from among the plurality of sensors based on detection signals of the sensors. A sensor specifying unit specifies the sensors having sensed the operation object from the selected sensor group based on the detection signals of the sensors. A position detecting unit detects a position of the operation object on the operation surface based on the detection signals of the specified sensors.