Controller for excitation output by waveform self-defining based on AVALON bus and control method thereof

A control method and controller technology, applied in the direction of instruments, electrical digital data processing, etc., can solve the problems of long time-consuming controller, cumbersome control process, difficult adjustment, etc., and achieve the effect of clear logical structure, flexible application, and universal application.

Inactive Publication Date: 2015-07-29
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to solve the problems of cumbersome control process, difficult adjustment, poor versatility and time-consuming design process of the controller itself in existing FPGA controllers that control peripherals, and proposes a custom AVALON bus-based Controller and control method for waveform excitation output

Method used

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  • Controller for excitation output by waveform self-defining based on AVALON bus and control method thereof
  • Controller for excitation output by waveform self-defining based on AVALON bus and control method thereof
  • Controller for excitation output by waveform self-defining based on AVALON bus and control method thereof

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Experimental program
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Effect test

specific Embodiment approach 1

[0025] The controller of the self-defined waveform excitation output based on the AVALON bus of the present embodiment, such as figure 1 As shown, the controller includes:

[0026] A DA conversion controller for reading waveform data information in RAM; wherein, the DA conversion controller is configured with a write-only master port for writing waveform data information into different registers to control peripheral devices; and one for Obtain the read-only master port of the waveform information data written in RAM;

[0027] RAM for storing user-set waveform data information; wherein, the RAM uses an off-the-shelf IP core to shorten the design cycle; and the RAM is set with a read-only slave port for being read by the DA conversion controller , and a write-only slave port used to write the waveform information of the microprocessor into the RAM to avoid conflicts caused by reading and writing RAM at the same time;

[0028] DA chip for waveform generation;

[0029] A time ...

specific Embodiment approach 2

[0032] The difference from Embodiment 1 is that in the controller control method based on the AVALON bus-based custom waveform excitation output of this embodiment, the channel end of the DA chip is also provided with a power operational amplifier chip for enhancing the driving capability of the DA chip. .

specific Embodiment approach 3

[0033] The controller control method based on the self-defined waveform excitation output of the AVALON bus of the present embodiment, the controller control method is realized by the following steps:

[0034] Step 1. The microprocessor will turn on the number of waveform channels set by the user, and the waveform data information: the total number of points per cycle of the waveform, the number of repetitions of the waveform cycle and the waveform cycle, and a series of discrete points of the waveform including the shape of the waveform and the amplitude of the waveform. The values ​​are sequentially stored in the FPGA on-chip RAM;

[0035] And when the repetition times of the set waveform period is between 1-65534, the waveform will repeat for the specified number of times and then disappear. When the repetition times of the set waveform period is 65535, the waveform will repeat until a new waveform is set or manually stop;

[0036] Step 2, using the waveform data informati...

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Abstract

The invention relates to a controller for excitation output by waveform self-defining based on an AVALON bus and a control method thereof, and belongs to the field of excitation output control. The existing controller for controlling peripherals in FPGA (field programmable gate array) has the defects of troublesome control process, easy mistaking, difficult adjusting, poor flexibility and universality, and long design time. The method comprises the following steps of enabling a microprocessor to store the setting number of waveform generation channels, waveform data information and a series of waveform discrete point values into an RAM (random access memory); starting a DA (digital to analog) conversion controller, repeatedly reading the waveform data information in the RAM, and respectively writing into corresponding registers; configuring the waveform data information under the mutual action of time interval controllers; starting a DA chip to convert and generate an expected task waveform. The method has the characteristics that the method is applied into the system for providing the excitation output, and the DA conversion chip with an SPI (serial peripheral interface) and a PIO (parallel input and output) interface is controlled to generate the waveform excitation output meeting the expectation of a user; the actual application value is high, the flexibility and convenience in use are realized, the universality is strong, and the like.

Description

technical field [0001] The invention relates to a controller and a control method based on an AVALON bus-based self-defined waveform excitation output. Background technique [0002] In many cases, users need the hardware system to be able to generate stimulus output according to a custom arbitrary waveform to meet some special needs. This process includes two parts: reading and storing user-defined waveform information data and generating consistent excitation output according to the stored waveform information. The whole process involves the control of many peripheral devices around the DA chip with SPI interface and PIO interface. At present, FPGA is mostly used to complete the control of peripherals. Due to the complexity of the entire control process, the logic written by the traditional method has the disadvantages of cumbersome control process, error-prone, difficult adjustment and modification, poor flexibility and versatility, and the entire design process takes a l...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/20
Inventor 许永辉李世斌毛一农李澄宇
Owner HARBIN INST OF TECH
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