A method of manufacturing finfet structure using stress memory technology

Abstract

The invention discloses a method for manufacturing a FinFET structure by a stress memorization technique. The method comprises the following steps: forming a Fin structure, gates and gate side walls on a substrate, removing the Fin parts outside the channels in the lower parts of the gates, sequentially forming an etching stop layer and a stress layer on the substrate in an NMOS area to cover the gate structures, and performing a high-temperature annealing process; and then, removing the stress layer and the etching stop layer, retaining the tensile stress directly applied by the stress layer to the two sides of the Fin channels, and restoring part of the Fins outside the channels in the lower parts of the gates to form a new Fin structure. According to the invention, the stress layer directly applies tensile stress to the two sides of the Fin channels, the stress contact area of the Fin channels is increased, a stronger stress effect can be achieved on an NMOS channel, higher electron mobility is gained, and the performance of semiconductors is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuit manufacturing, and more particularly, to a method for manufacturing a FinFET structure using stress memory technology. Background technique [0002] As the miniaturization of the feature size of VLSI continues, the size of field effect transistors is also getting smaller and faster, and the operation speed is also getting faster. How to effectively improve electron transport performance and improve the driving current of circuit components is becoming increasingly important. [0003] By increasing the carrier mobility in the channel region, the driving current of the CMOS device can be increased, and the performance of the device can be improved. An effective mechanism to increase carrier mobility is to create stress in the channel region. [0004] Generally speaking, the mobility of electrons in silicon increases with the increase of tensile stress along the electron mi...

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Problems solved by technology

[0008] However, as the size of the device decreases, for example, in the manufacture of a three-dimensional FinFET (fin field effect transistor), due to the complexity of the device, the above-mentioned stress memory technology applied to the planar semiconductor device cannot be applied to the FinFET. structure

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