Semiconductor structures and methods of forming them
A semiconductor and wet etching technology, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as poor transistor performance
Active Publication Date: 2021-06-08
SEMICON MFG INT (SHANGHAI) CORP +1
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Problems solved by technology
[0003] However, in the prior art, the silicon germanium layer is far away from the channel, and the performance of the transistor is poor.
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[0023] There are many problems with the formation method of the semiconductor structure, for example, the performance of the transistor is poor.
[0024] Combining with a method for forming a semiconductor structure, the reasons for the poor performance of the transistor are analyzed:
[0025] Figure 1 to Figure 3 It is a structural schematic diagram of each step of a method for forming a semiconductor structure.
[0026] Please refer to figure 1 , providing a substrate 100, the substrate 100 has a gate layer 101; a first sidewall 102 and a second sidewall 103 are formed on the sidewall of the gate layer 101, and the sidewall of the second sidewall 103 exposing the sidewall of the first sidewall 102;
[0027] Please refer to figure 2 and image 3 , image 3 for figure 2 In the enlarged view of region 1, using the gate layer 101, the first sidewall 102 and the second sidewall 103 as a mask, the gate layer 101, the first sidewall 102 and the second sidewall 103 are bot...
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Abstract
A semiconductor structure and a method for forming the same, the method comprising: a substrate having a gate layer; forming a first sidewall and a second sidewall on the sidewall of the gate layer, the first sidewall including the sidewall on the sidewall of the gate layer The first side wall part and the initial second side wall part on the base, the first side wall part is connected with the initial second side wall part, the second side wall is located on the initial second side wall part, and covers the first side wall sidewall, the sidewall of the second sidewall exposes the sidewall of the initial second sidewall; an initial opening is formed in the substrate on both sides of the gate layer, the first sidewall and the second sidewall, and the sidewall of the initial opening is perpendicular to the bottom ; After the initial opening is formed, part of the initial second sidewall portion is removed to form a second sidewall portion, and the sidewall of the second sidewall portion is recessed toward the grid layer relative to the sidewall of the second sidewall portion; The electrode layer is a mask, and openings are formed in the substrates on both sides of the second side wall and the gate layer, and the side walls of the openings have apex angles, and the apex angles extend into the substrate below the gate layer. The method improves transistor performance.
Description
technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] In the advanced complementary metal-oxide-semiconductor (CMOS) industry, in order to increase the stress (Stress) of the channel region of the transistor and enhance its carrier mobility; among them, embedded silicon germanium is used to form the source region and the drain region, so that the channel Stress is applied to the track area. In order to achieve better results, generally, Recess etching is required before source / drain epitaxial silicon germanium, after etching, a sigma (Σ) type depression is formed, and then silicon germanium is epitaxially grown in the sigma type depression to enhance the stress resistance. effect, improving the performance of semiconductor structures. [0003] However, in the prior art, the silicon germanium layer is far away from the channel, and the p...
Claims
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IPC IPC(8): H01L21/336H01L29/78
CPCH01L29/66795H01L29/7848H01L29/785
Inventor 王寅
Owner SEMICON MFG INT (SHANGHAI) CORP