Unlock instant, AI-driven research and patent intelligence for your innovation.

Semiconductor structure and formation method thereof

A semiconductor and wet etching technology, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as poor performance of transistors, and achieve the effect of improving performance and strong stress effect

Active Publication Date: 2018-11-13
SEMICON MFG INT (SHANGHAI) CORP +1
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, in the prior art, the silicon germanium layer is far away from the channel, and the performance of the transistor is poor.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Semiconductor structure and formation method thereof
  • Semiconductor structure and formation method thereof
  • Semiconductor structure and formation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0023] There are many problems with the formation method of the semiconductor structure, for example, the performance of the transistor is poor.

[0024] Combining with a method for forming a semiconductor structure, the reasons for the poor performance of the transistor are analyzed:

[0025] Figure 1 to Figure 3 It is a structural schematic diagram of each step of a method for forming a semiconductor structure.

[0026] Please refer to figure 1 , providing a substrate 100, the substrate 100 has a gate layer 101; a first sidewall 102 and a second sidewall 103 are formed on the sidewall of the gate layer 101, and the sidewall of the second sidewall 103 exposing the sidewall of the first sidewall 102;

[0027] Please refer to figure 2 and image 3 , image 3 for figure 2 In the enlarged view of region 1, using the gate layer 101, the first sidewall 102 and the second sidewall 103 as a mask, the gate layer 101, the first sidewall 102 and the second sidewall 103 are bot...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a semiconductor structure and a formation method thereof. The method includes the following steps that: a substrate is provided, wherein the substrate is provided with a gatelayer; a first side wall and a second side wall are formed on the sidewall of the gate layer, the first side wall includes a first side wall portion on the sidewall of the gate layer and an initial second side wall portion on the substrate, the first side wall portion is connected with the initial second side wall portion, the second side wall is located on the initial second side wall portion andcovers the sidewall of the first side wall portion, the sidewall of the second side wall exposes the sidewall of the initial second side wall portion; an initial opening is formed at two sides of thegate layer, the first side wall and the second side wall in the substrate, the sidewall of the initial opening is perpendicular to the bottom of the initial opening; after the initial opening is formed, a part of the initial second side wall portion is removed, so that a second side wall portion is formed, and the sidewall of the second side wall portion is recessed towards the gate layer with respect to the sidewall of the second side wall; and with the second side wall portion and the gate layer adopted as a mask, an opening is formed at two sides of the second side wall portion and the gate layer in the substrate, and the sidewall of the opening has an apex angle, and the apex angle extends into the substrate below the gate layer. With the method adopted, transistor performance can beimproved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] In the advanced complementary metal-oxide-semiconductor (CMOS) industry, in order to increase the stress (Stress) of the channel region of the transistor and enhance its carrier mobility; among them, embedded silicon germanium is used to form the source region and the drain region, so that the channel Stress is applied to the track area. In order to achieve better results, generally, Recess etching is required before source / drain epitaxial silicon germanium, after etching, a sigma (Σ) type depression is formed, and then silicon germanium is epitaxially grown in the sigma type depression to enhance the stress resistance. effect, improving the performance of semiconductor structures. [0003] However, in the prior art, the silicon germanium layer is far away from the channel, and the p...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L29/78
CPCH01L29/66795H01L29/7848H01L29/785
Inventor 王寅
Owner SEMICON MFG INT (SHANGHAI) CORP