A kind of on-chip self-test circuit and method of storage unit for RRAM

A cell and self-test technology, applied to the on-chip self-test circuit and field of memory cells used in RRAM, can solve the problems of time-consuming and complicated test excitation, save array read operations, save test costs, and simplify The effect of the test sequence

Active Publication Date: 2017-11-10
XI AN UNIIC SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
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  • Application Information

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Problems solved by technology

[0014] In order to solve the technical problems of time-consuming and cumbersome test incentives in existing memory chip testing methods, the present invention provides a method for self-testing and screening of on-chip storage units for RRAM memory testing

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  • A kind of on-chip self-test circuit and method of storage unit for RRAM
  • A kind of on-chip self-test circuit and method of storage unit for RRAM
  • A kind of on-chip self-test circuit and method of storage unit for RRAM

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Embodiment Construction

[0053] In view of this situation, the present invention is based on the basic structure and the basic operation process of the RRAM internal circuit, adding the latching mechanism of the successful flag bit that returns when writing verification at every turn, specifically as follows:

[0054] like Figure 4a , Figure 4b It is a schematic diagram of the implementation of the specific module of the present invention, and a latch mechanism is added between the data path and the page buffer, so as to complete the judgment function of the read verification result flag and the realization of the latch and write page buffer function, mainly including A control judgment logic module, a latch enabling module, a write-back address module, a latch module and a page buffer write-back module.

[0055] At the same time, the latch enable module and the write-back address module are added. If the read verification result of the current address is successful, the latch enable module will di...

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Abstract

The invention relates to a storage unit chip self-test circuit and method for RRAM, including a latch module, a latch enable module, a write-back address module and a page buffer write-back module; the latch module is used to receive a success flag bit, and sample the successful flag bit of the current address when the latch signal is received; the latch enable module is used to generate a latch signal when it is known that the current operation is the last operation of the current address; the write-back address module It is used to extract the current address information from the address generator when it is known that the current operation is the last operation of the current address, and send it to the page buffer write-back module; the page buffer write-back module generates write-back address information and write-back enable , and sent to the page cache. The present invention solves the technical problems of time-consuming and cumbersome test incentives in the existing memory chip testing method. The present invention can more realistically perform self-test statistics on the on-chip storage array pages, and record and reflect the location information of the damaged units on the pages. in the cache module.

Description

technical field [0001] The invention relates to an on-chip detection method of a storage unit used in RRAM. Background technique [0002] As a traditional mainstream non-volatile storage medium, FLASH memory plays a core and indispensable role in the field of electronic information. With the continuous shrinking of the process size, due to complex mask patterns and expensive manufacturing costs, increasing word line leakage and crosstalk between cells, and fewer and fewer electrons in the floating gate, FLASH memory development has been restricted. Therefore, the industry gradually researches and develops some emerging non-volatile memories, such as CBRAM, MRAM, PRAM, RRAM and so on. Among them, RRAM, as a new type of non-volatile data storage technology, has the advantages of high speed, large capacity, low power consumption, low cost and high reliability. RRAM is generally considered to be the best alternative to FLASH memory. Potential new memory. [0003] Like the no...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/12
CPCG11C13/0002G11C13/004G11C13/0069
Inventor 王小光
Owner XI AN UNIIC SEMICON CO LTD
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