Resistive memory and operating method therefor
A technology of resistive memory and resistive storage, which is applied in the field of memory, and can solve problems affecting the operation efficiency of traditional resistive memory, erasing failure, and erasing current drop.
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no. 1 example
[0041] Please also refer to figure 1 , figure 2 and image 3 , figure 1 is shown as a schematic diagram of a memory cell of a resistive memory according to the first embodiment, figure 2 is shown as a schematic diagram of a programming resistance memory cell, image 3 A schematic diagram of an erase resistance memory cell is shown. The memory cell 11 includes a resistive memory cell Rcell, a main transistor TM and an auxiliary transistor TA. The drains of the main transistor TM and the auxiliary transistor TA are coupled to the resistance storage unit R cell one end. Resistance memory cell R cell The other end of is coupled to the corresponding drain line. The gate of the main transistor TM is coupled to the corresponding main gate line, and the gate of the auxiliary transistor TA is coupled to the corresponding auxiliary gate line. The gate voltage applied to the main gate line can be adjusted according to the position of the main gate line. Similarly, the gate ...
no. 2 example
[0051] Please also refer to Figure 9 and Figure 10 , Figure 9 is shown as a circuit diagram of a resistive memory according to the second embodiment, Figure 10 It is a circuit layout diagram of the resistive memory according to the second embodiment. The aforementioned drain line is Figure 9 Take the drain lines DL1~DL3 as an example, and the aforementioned source lines are Figure 9 The source lines SL1 - SL4 are taken as an example for illustration. The aforementioned main gate line is Figure 9 Take the main gate lines GL1~GL3 as an example, and the aforementioned auxiliary gate lines are Figure 9 The auxiliary gate lines GL1A˜GL3A are taken as an example for illustration. The resistive memory 2 includes memory cells 11 , drain lines DL1 - DL3 , main gate lines GL1 - GL3 , auxiliary gate lines GL1A - GL3A and source lines SL1 - SL4 . The drain lines DL1 - DL3 , the main gate lines GL1 - GL3 , the auxiliary gate lines GL1A - GL3A and the source lines SL1 - SL4 ...
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