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Calculation method of sort type constant false alarm threshold

A calculation method, constant false alarm technology, applied in the field of signal processing

Inactive Publication Date: 2015-12-02
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

[0010] The disadvantage of the bubble method is that it can only compare "one set" of data in each clock cycle, that is, two data

Method used

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  • Calculation method of sort type constant false alarm threshold
  • Calculation method of sort type constant false alarm threshold
  • Calculation method of sort type constant false alarm threshold

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Embodiment Construction

[0028] Such as figure 2 As shown, it is a butterfly comparison processing unit when n=6, which mainly includes two stages of comparison. If a set of data contains n digits for comparison, a butterfly comparison processing unit needs n comparator resources.

[0029] The process of parallel quick sorting for ordered sequences is as follows:

[0030] First, put the data in a set of data into the butterfly processing unit;

[0031] Second, the butterfly processing unit performs two-level comparison in turn: the first level is intra-group comparison, with a total of n / 2 groups of data, if x i1 >x i2 (i=1,2...,n / 2), then exchange x i1 and x i2 s position. Put the results of the first-level parallel comparison into the second-level comparison between groups, that is, compare the size of two adjacent elements between adjacent groups, if or x 11 >x (n / 2)2 , then exchange x i2 and x (i+1)1 or x 11 and x (n / 2)2 s position. A butterfly is processed.

[0032] Thirdly, afte...

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Abstract

The invention discloses a low-latency butterfly assembly line sorting method based on an FPGA, belonging to the technology of radar signal processing, particularly relating to digital signal sorting technology. A butterfly processing unit divides reference unit sequences into groups according to the odd and even numbers of elements, 'in-group' and 'inter-group' sorting are carried out respectively, then a butterfly processor is subjected to assembly line reuse treatment, which means that data is subjected to parallel traverse sorting until the whole sorting is ended after the operation of n-1 hours. According to the method, through using the parallel sorting, the signal processing speed is greatly improved, the processing delay is reduced, and the disadvantage that too much time is consumed by traditional OS CFAR processing is overcome.

Description

technical field [0001] The invention relates to signal processing technology, in particular to a digital signal sorting method. Background technique [0002] CFAR processing technology is one of the main technologies of radar signal detection and processing, and it is also a key step in the actual realization of radar. Among them, sorted CFAR processing (OSCFAR) is one of many CFAR processing techniques. Order statistics OS (order statistics) method is derived from the sorting processing technology of digital image processing, and it plays a significant role in anti-interference. In a multi-target environment, it has a better ability to resist interference targets than the average CFAR processing algorithm, and the performance degradation in the uniform clutter background and clutter edge environment is moderate and acceptable. [0003] OSCFAR for reference unit data {x 1 ,x 2 ,...,x N} to form a new sequence in ascending order, denoted as {x (1) ,x (2) ,...,x (N)}. ...

Claims

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Application Information

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IPC IPC(8): G01S7/02
CPCG01S7/02
Inventor 周云赵延栋林杰周杨鹏于雪莲
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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