an aging board
A technology for aging boards and substrates, applied in the field of aging boards, can solve the problems of reducing work efficiency, loss of accessories, and long time-consuming plugging and unplugging processes.
Active Publication Date: 2018-09-25
FOUNDER MICROELECTRONICS INT
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- Claims
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Problems solved by technology
In this kind of sample method: the plugging and unplugging process of accessories takes a long time, which reduces work efficiency; and usually in order to ensure good contact of the aging board, the plugging holes of the accessories on the aging board are usually designed tightly, and frequent plugging and unplugging of accessories will cause problems. Serious loss of accessories
Method used
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Embodiment Construction
[0025] The burn-in board provided by the embodiment of the present invention includes: a substrate, on which a socket for inserting the device under test and the first row of pins to the fourth row of pins are arranged, and the socket includes a source S port, a drain D port, a gate G port; the first pin on the first row of pins is connected to the second pin, and the first pin or the second pin is grounded; the first pin on the second row of pins is connected to the S port, and the second pin is connected to the G port; the third The first pin to the third pin on the pin row are respectively connected to the G port, the D port and the S port; the first pin to the third pin on the fourth row of pins are connected to VCC; the first pin to the second pin on the first row The stitches are respectively opposite to the first stitch and the second stitch of the second row of needles, and the first to third stitches of the third row of needles are respectively opposite to the first to...
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The embodiment of the invention relates to the technical field of semiconductor chip quality reliability, and especially relates to a burn-in board which is simple to operate and highly universal. According to the embodiment of the invention, a first pin and a second pin on a first pin header are communicated, and the first pin or the second pin is grounded; a first pin on a second pin header is communicated with a port S, and a second pin is communicated with a port G; a first pin, a second pin and a third pin on a third pin header are respectively communicated with the port G, a port D and the port S; and a first pin, a second pin and a third pin on a fourth pin header are communicated with VCC. Any of the port S, the port D and the port G can be grounded or connected to a power source by plugging a short-circuit cap onto the pin headers, so that a variety of experiments can be conducted by changing the plugging of the short-circuit cap, and the universality of the burn-in board is further improved.
Description
technical field [0001] The invention relates to the technical field of semiconductor chip quality reliability, in particular to an aging board. Background technique [0002] With the continuous development of semiconductor technology, the application fields of chips begin to expand continuously, and the requirements for the reliability of chips are also getting higher and higher. In order to ensure the reliability of the chip, the burn-in test (Burn-in Test) is usually performed on the chip, that is, after the chip is manufactured, the chip is often mounted on an aging board. 150 ℃ and above, so that the chip exposes the defects in the device as soon as possible, so as to detect the defective device. [0003] At present, the burn-in board commonly used in the industry needs to analyze the failure mode of the chip by plugging and unplugging accessories (jumpers, resistors) on the burn-in board. In this sample method: the plugging and unplugging process of accessories takes ...
Claims
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IPC IPC(8): H01L21/66
Inventor 徐娟曹婷
Owner FOUNDER MICROELECTRONICS INT