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Thin-type chip packaging structure and manufacturing method thereof

A technology of packaging structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., and can solve problems such as chip cracking and chip damage

Inactive Publication Date: 2016-01-27
DAWNING LEADING TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this step, the gel will press against the chip when it is injected, and the chip will often fail to withstand it and crack
In addition, the colloid usually undergoes a heating procedure after injection molding to accelerate the solidification of the colloid; however, the chip will be squeezed when the substrate or colloid expands with heat and contracts, which may easily damage the chip

Method used

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  • Thin-type chip packaging structure and manufacturing method thereof
  • Thin-type chip packaging structure and manufacturing method thereof
  • Thin-type chip packaging structure and manufacturing method thereof

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Embodiment Construction

[0023] First please refer to figure 1 , which is a side view of the package structure according to the first embodiment of the present invention. The present invention provides a packaging structure for thinned chips. In the first embodiment, the packaging structure 1 includes: a substrate 110 , a thinned chip 120 , a reinforcement layer 130 and a sealant 140 .

[0024] The thinned chip 120 refers to a chip with a smaller thickness, for example, the thickness may be less than 80 microns, and preferably less than 35 microns. The thinned chip 120 can be disposed on the substrate 110 and electrically connected to the substrate 110 . The electrical connection method can be an inverse crystal method or a wire bonding method to electrically connect to the substrate 110 , but not limited thereto. In the following, the electrical connection between the thinned chip 120 and the substrate 110 by the wire 121 is used as an example for illustration.

[0025] The strengthening layer 130 ...

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PUM

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Abstract

The invention provides a thin-type chip packaging structure comprising a substrate, a thin-type chip, a reinforcing layer and a sealant body. The thin-type chip is arranged on the substrate and electrically connected with the substrate. The reinforcing layer is arranged on the thin-type chip. The sealant body is formed on the substrate and wraps the thin-type chip and the reinforcing layer. The reinforcing layer bears pressure or stress forming the sealant body so as to protect the thin-type chip. The invention also provides a manufacturing method of the thin-type chip packaging structure so that the thin-type chip packaging structure can be manufactured.

Description

technical field [0001] The present invention relates to a packaging structure and a manufacturing method thereof, in particular to a packaging structure of a thinned chip and a manufacturing method thereof. Background technique [0002] The purpose of the package structure of the chip is not only to make it easy to connect the chip to the circuit board, but also to protect the chip from being damaged by external forces, and to prevent moisture or dust from affecting the performance of the chip; in addition, some package structures can provide A better heat dissipation path for the chip. [0003] With the evolution of the times, the electronic components on the chip are becoming denser and the packaging structure is becoming more and more complex. In addition, under the prevailing trend of portable electronic devices and wearable electronic devices, chips and chip packaging structures also have a trend of miniaturization. However, if the thickness of the chip is reduced (ie...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/31H01L21/50H01L21/56
CPCH01L2924/181H01L2224/32145H01L2224/48091H01L2224/73265H01L2924/00014H01L2924/00012
Inventor 林殿方
Owner DAWNING LEADING TECH