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Method and device for efficiently releasing sequential input and output streams

An efficient, flow-gradient technique for applications such as I/O to record carriers, I/O processes for data processing, instrumentation, etc., which can solve problems such as slowing down write performance

Inactive Publication Date: 2019-06-07
DOT HILL SYST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If there is no room in the write cache, the memory controller must store the write data directly into slower memory elements, which slows down write performance

Method used

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  • Method and device for efficiently releasing sequential input and output streams
  • Method and device for efficiently releasing sequential input and output streams
  • Method and device for efficiently releasing sequential input and output streams

Examples

Experimental program
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Embodiment Construction

[0110] The inventors of this application have observed some performance issues encountered with certain I / O workloads from the host computer to the storage controller. In particular, the write cache in the storage controller may be difficult to manage efficiently when a large number of sequential write streams are involved.

[0111] Partial disk array write operations involve storing new write data into a write cache, reading old write data and pars from storage elements, generating new pars, and writing new writes input data and new parity to the storage element. Such an approach makes it more efficient to process parity disk array write operations in a full stripe write rather than a partial stripe write. The present invention improves performance by releasing full stripes rather than partial stripes when writing streams in larger sequences.

[0112] Figure 1a A block diagram of components of the non-host-based data storage system 100 according to the first embodiment of ...

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Abstract

A method for destaging write data from a storage controller to storage devices is provided. The method includes determining that a cache element should be transferred from a write cache of the storage controller to the storage devices, calculating that a dirty watermark is above a dirty watermark maximum value, identifying a first cache element to destage from the write cache to the storage devices, transferring a first data container including the first cache element to the storage devices, and incrementing an active destage count. The method also includes repeating determining, calculating, identifying, transferring, and incrementing if the active destage count is less than an active destage count maximum value. The active destage count is a current number of write requests issued to a virtual disk that have not yet been completed, and the virtual disk is a RAID group comprising one or more specific storage devices.

Description

technical field [0001] The technical field of the present invention generally relates to computer data storage systems, and more particularly, to methods and apparatus for efficiently demultiplexing sequential I / O streams from a storage controller cache to a stripe region of storage devices. Background technique [0002] In the data storage system, many well-known technologies, such as data caching technologies including write-back caching, are used to improve write performance. When a storage controller receives a write request from a host computer, if there is room in the write cache, the storage controller stores the write data into the write cache and notifies the host computer that it has Complete this write request. This allows the host computer to continue to issue additional read or write requests. If there is no room in the write cache, the memory controller must store the write data directly into slower memory elements, which slows down write performance. [000...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F3/06
CPCG06F3/061G06F3/0656G06F3/0689G06F11/1076G06F12/0804G06F12/0868G06F12/0871G06F2212/1016G06F2212/1044G06F2212/262G06F2212/312G06F2211/1009G06F2211/1059
Inventor 麦克·大卫·巴瑞尔查柯利·大卫·卓特
Owner DOT HILL SYST