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Semiconductor structure and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in semiconductor devices, electric solid state devices, electrical components, etc., can solve problems such as misalignment

Active Publication Date: 2018-06-22
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Nevertheless, there is still a misalignment between the two types of holes

Method used

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  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof

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Embodiment Construction

[0033] The semiconductor structure and its manufacturing method will be described below. For ease of explanation, the following embodiments will specifically take a three-dimensional vertical channel storage device (such as a three-dimensional vertical channel NAND storage device) as an example. However, the invention is not limited thereto, for example, the method can be applied to other semiconductor structures.

[0034] Figure 1A-Figure 11B It is a schematic diagram of a method for manufacturing a semiconductor structure according to an embodiment of the present invention. In this embodiment, although not particularly limited, holes for bit lines (hereinafter referred to as first holes) and holes for word line replacement (hereinafter referred to as second holes) are formed to have the same shape and size. In this embodiment, the memory layer is linear. For the sake of clarity, components may not be drawn according to their actual relative sizes, and some component symb...

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Abstract

The invention discloses a semiconductor structure and a manufacturing method thereof. The method includes the following steps: first, forming a stack on a bottom layer on a substrate. The stack is composed of alternating multiple sacrificial layers and multiple insulating layers; then, simultaneously forming through-layer stacks. A plurality of first holes and a plurality of second holes in the layer; in the formed semiconductor structure, the first holes and the second holes are equidistantly separated from each other in at least one arrangement direction.

Description

technical field [0001] The invention relates to a semiconductor structure and a manufacturing method thereof. In particular, the present invention relates to a semiconductor structure in which a plurality of first holes and a plurality of second holes are equidistantly separated from each other in at least one alignment direction and a method of manufacturing the same. Background technique [0002] As the number of layers stacked in the three-dimensional semiconductor structure increases, the height of the linear structures in the three-dimensional semiconductor structure also increases, and thus faces the problem of collapse or bending. Compared with the linear structure, the strength of the porous structure is higher. Therefore, a hole structure is introduced into the three-dimensional semiconductor structure. For example, in a three-dimensional vertical channel memory device, holes for forming bit lines can be constructed. [0003] In the 3D vertical channel memory dev...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11568H10B43/30H10B69/00
Inventor 赖二琨
Owner MACRONIX INT CO LTD