Edge combined digital frequency multiplier based on on-chip transformer

Abstract

The invention discloses an edge combined digital frequency multiplier based on an on-chip transformer, and relates to a digital frequency multiplier. First and second edge combiners and a dual pole load network based on the on-chip transformer are arranged. Input signals of the first and second edge combiners each consist of 2n signals with a phase difference being 360 degrees / 2n. An output end of the first edge combiner is connected with one end of a primary coil of the on-chip transformer and an upper polar plate of an input capacitor. An output end of the second edge combiner is connected with the other end of the primary coil of the on-chip transformer and a lower polar plate of the input capacitor. An intermediate node of the primary coil of the on-chip transformer is connected with power supply voltage of the first and second edge combiners or the power supply voltage of the entire edge combined digital frequency multiplier based on the on-chip transformer. One end of a secondary coil of the on-chip transformer is connected with an upper polar plate of an output capacitor as a positive pole of output signals, and the other end of the secondary coil of the on-chip transformer is connected with a lower polar plate of the output capacitor as a negative pole of the output signals. An intermediate node of the secondary coil of the on-chip transformer is grounded.

Description

technical field [0001] The invention relates to a digital frequency multiplier, in particular to an edge-combined digital frequency multiplier based on an on-chip transformer with broadband and high harmonic suppression functions. Background technique [0002] With the rapid development of the modern semiconductor industry, the deep submicron digital CMOS process continues to evolve to a smaller size, from 90nm to 65nm, followed by 40nm, 28nm... The processing cost of silicon wafers per unit area can still be achieved in mass production. Keep it at about 0.1~0.2 US dollars / mm 2 ; For integrated circuits, it is accompanied by smaller chip size, faster operating speed and lower power consumption. Therefore, benefiting from the rapid development of modern advanced semiconductor technology, whether it is consumer electronics, mobile phones, Bluetooth modules, or radar detection, satellite communications, industrial sectors and consumers can obtain better functional experience a...

AI Technical Summary

Problems solved by technology

[0019] Due to its own characteristics, the quality factor of the planar integrated inductor based on the silicon substrate is not high, so its filtering ability is limited when used as a circuit load, especially in the edge combined digital frequency multiplier, a single inductor or a simple inductor and capacitor It is difficult for the network to effectively suppress the harmonic signals generated by the non-ideality of the input signal and the transistor mismatch of the EC circuit itself

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