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Array substrate test circuit, display panel and flat display device

A technology for array substrates and test circuits, applied in static indicators, instruments, etc., can solve problems such as reducing product stability, signal impact, and increasing product analysis time.

Active Publication Date: 2018-11-23
WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The technical problem mainly solved by the present invention is to provide an array substrate test circuit, a display panel and a flat display device, so as to solve the problem that the signal output by the chip in the array substrate test circuit is exposed to the air through the array substrate test unit and affect the signal in the chip. , thus increasing the product analysis time and reducing the stability of the product

Method used

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  • Array substrate test circuit, display panel and flat display device
  • Array substrate test circuit, display panel and flat display device
  • Array substrate test circuit, display panel and flat display device

Examples

Experimental program
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Embodiment Construction

[0030] seefigure 1 , is the circuit diagram of the array substrate test circuit in the prior art. When the array substrate test unit 1 is working, the chip 2 has no signal output. At this time, the pads 3 and 4 in the array substrate test unit 1 pass the received turn-on voltage terminal signal VGH and turn-off voltage terminal signal VGL through the electrostatic protection device. 5. The corresponding traces connected with the chip 2 are transmitted into the panel, and the other pads in the array substrate test unit 1 are the scan driving area (GOA area) and the pixel display area (AA area) of the panel. ) provides a signal; when the chip 2 is working, there is no external signal on the pads 3 and 4 of the array substrate test unit 1, and the on-voltage terminal signal VGH and the off-voltage terminal signal VGL output by the chip 2 pass through The electrostatic protection device 5 and the corresponding traces are provided to the pads 3 and 4 in the array substrate test uni...

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PUM

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Abstract

The invention discloses an array substrate test circuit, a display panel and a flat panel display device. The array substrate test circuit comprises a chip, a unidirectional control unit and an array substrate test unit. The chip comprises a first pin which transmits a starting voltage side signal and a second pin which transmits a shutdown voltage side signal. The array substrate test unit comprises an electrostatic protection device, a first welding disc which transmits the starting voltage side signal and a second welding disc which transmits the shutdown voltage side signal, wherein each of the first and second welding discs is connected with one pin of the electrostatic protection device. When the chip works, the unidirectional control unit is cut off, and the starting voltage side signal and the shutdown voltage side signal transmitted by the chip cannot be outputted to the first and second welding discs. When the array substrate test unit works, the unidirectional control unit is conducted, and the first and second welding discs transmit the received starting voltage side signal and the shutdown voltage side signal to the chip so as to avoid influence on the signals in the chip and then avoid increasing of product analysis time and reducing of the stability of the product.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate test circuit, a display panel and a flat display device. Background technique [0002] The current flat-panel display device adopts a scanning driving circuit, that is, using the existing thin-film transistor flat-panel display array manufacturing process to manufacture the scanning driving circuit on the array substrate, so as to realize the driving mode of progressive scanning, and at the same time, set the array substrate test on the array substrate. However, in the existing array substrate test circuit, the signal output by the chip is exposed to the air through the array substrate test unit, which will affect the signal in the chip, and The jump of the signal in the chip will cause the failure of the array substrate test unit, so that the test analysis that needs to be performed by the array substrate test unit cannot be carried out, which increas...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G09G3/00
CPCG09G3/006
Inventor 马亮
Owner WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD