Shifting register and drive method thereof, grid drive circuit and display device
A shift register, potential technology, applied in static memory, digital memory information, instruments, etc., can solve problems such as unfavorable narrow borders and large space occupied by gate drive circuits
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Embodiment 1
[0062] figure 1 A schematic structural diagram of a shift register provided in Embodiment 1 of the present invention, as shown in figure 1 As shown, the shift register includes: a pre-charge reset module 1, a pull-down node control module 2, several output control modules 3 and several output reset modules 4, the output reset modules 4 correspond to the output control modules 3 one-to-one, and the pre-charge The reset module 1, the pull-down node control module 2 and each output control module 3 are connected to the pull-up node PU, and the output control module 3 and each output reset module 4 are connected to the pull-down node PD.
[0063] Wherein, the precharge reset module 1 is used for precharging or resetting the pull-up node PU under the control of the precharge signal input from the precharge signal input terminal INPUT and the reset signal input from the reset signal input terminal RESET.
[0064] The pull-down node control module 2 is used to control the potential ...
Embodiment 2
[0074] figure 2 The circuit schematic diagram of the shift register provided for the second embodiment of the present invention, such as figure 2 as shown, figure 2 The circuit diagram shown is figure 1 The embodiment of the shown structure diagram, in this embodiment, will be exemplarily described by taking two output control modules 31 / 32 and two output reset modules 41 / 42 as an example.
[0075] In this embodiment, optionally, each output control module 31, 32 includes a seventh transistor M7 / M7' and a capacitor C1 / C1'; the control electrode of the seventh transistor M7 / M7' and the pull-up node PU connection, the first pole is connected to the corresponding clock control signal line CLK1 / CLK2, the second pole is connected to the corresponding signal output terminal OUT1 / OUT2; the first terminal of the capacitor C1 / C1' is connected to the pull-up node PU, and the second terminal It is connected with the second pole of the seventh transistor M7 / M7'.
[0076] Optionally...
Embodiment 3
[0106] Figure 4 The flow chart of the driving method of the shift register provided by Embodiment 3 of the present invention, such as Figure 4 As shown, wherein, the shift register can adopt the shift register in the above-mentioned embodiment 1 or embodiment 2, and the driving method includes:
[0107] Step 101, the precharge reset module precharges the pull-up node under the control of the precharge signal input by the precharge signal input terminal, and the pull-down node control module pulls down the potential of the pull-down node under the control of the potential of the pull-up node ;
[0108] Step 102, each output control module sends the clock control signal in the corresponding clock control signal line to the corresponding signal output terminal under the control of the potential of the pull-up node, so that the signal output terminal outputs the scanning signal;
[0109] Step 103, the precharge reset module resets the pull-up node under the control of the rese...
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