Neuron computing unit, neuron computing module and artificial neural network computing core

Abstract

The invention relates to a neuron computing unit, and the neuron computing unit comprises a decoding module, an address weight module, a multiplier and an accumulator. The decoding module receives and parses address information and axon value information. The address weight module receives the address information and judges whether the address information matches address information stored in the address weight module, and, if the address information matches the address information stored in the address weight module, a weight value corresponding to the address information is output. The multiplier multiplies the axon value information by the weight value. The accumulator accumulates computing results output by the multiplier and outputs the accumulated computing result. The neuron computing unit provided by the invention adopts an addressing and computing integrated design idea, so a limit of a fixed-scale all-connected layout mode for the number of neuron computing units is broken through, and neural network computing efficiency is enhanced.

Description

technical field [0001] The invention belongs to the field of artificial neural network calculation, in particular to a neuron calculation unit. Background technique [0002] Artificial neural network is a computing model evolved from the synapse-neuron structure of the biological brain, which can perform large-scale and complex operations in parallel, and is highly nonlinear and adaptive. Similar to the neural network structure of the biological brain, the artificial neural network can be defined as consisting of basic structures such as neuron computing units, axon units, dendrite units, and synapse units. The neuron computing unit is the most basic computing unit, which can perform simple mathematical operations; the axon unit is responsible for outputting the results of neuron calculations, and a neuron has one axon; the dendritic unit is the input of neuron calculations, and a neuron can There are multiple dendrites; the synaptic unit represents the weight of the connec...

AI Technical Summary

Problems solved by technology

However, most neural network computing chips currently adopt the design idea of ​​separating the computing unit (neuron) from the connection unit (synaptic matrix). Due to the use of a fixed-scale full-connection layout method, it limits the number of neurons in a single core. At the same time, in the application of non-fully connected neural networks, it will also cause a waste of storage resources for unconnected synaptic points

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