Formation method of fin field effect transistor

Abstract

A method for forming a fin field effect transistor comprises: providing a substrate, wherein the substrate includes first regions and second regions located between adjacent first regions, a plurality of discrete fins are formed on the surface of the substrate, and the distances between the adjacent fins are the same; fully filling the surface of the substrate between the adjacent fins with a first dielectric layer, wherein the first dielectric layer covers the sidewall surfaces of the fins; removing the first dielectric layer of the second regions to expose the sidewall surfaces of the fins in the second regions; oxidizing the fins of the second regions to convert the fins of the second regions into an oxidizing structure; forming a second dielectric layer on the substrate in the second regions, wherein the second dielectric layer also covers the sidewall surface of the oxidizing structure, and the sidewall surface of the first dielectric layer in the first regions; etching back a part of thickness of the first dielectric layer, the second dielectric layer, and the oxidizing structure. The method forms a number of fins with different pattern densities and with good feature sizes and morphology so as to improve the electrical performance of the fin field effect transistor.

Description

technical field

[0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a fin field effect transistor. Background technique

[0002] With the continuous development of semiconductor process technology, the development trend of semiconductor process nodes following Moore's Law continues to decrease. In order to adapt to the reduction of process nodes, the channel length of MOSFET field effect transistors has to be continuously shortened. The shortening of the channel length has the advantages of increasing the die density of the chip and increasing the switching speed of the MOSFET field effect tube.

[0003] However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so that the control ability of the gate to the channel becomes worse, and the gate voltage pinches off the channel. The difficulty is also increasing, making the pheno...

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