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Chip packaging structure and manufacturing method therefor

A chip packaging structure and chip technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device parts, semiconductor devices, etc., can solve the problem of inability to realize rapid and uniform heat dissipation of multiple heterogeneous chips and discrete devices, which is not conducive to improving the system Level chip packaging heat dissipation efficiency and other issues

Active Publication Date: 2017-05-17
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this heat dissipation method cannot achieve rapid and uniform heat dissipation of multiple heterogeneous chips and discrete devices for system-in-chip packaging, which is not conducive to improving the heat dissipation efficiency of system-in-chip packaging

Method used

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  • Chip packaging structure and manufacturing method therefor
  • Chip packaging structure and manufacturing method therefor
  • Chip packaging structure and manufacturing method therefor

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Experimental program
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Embodiment Construction

[0043] Embodiments of the present invention will be described below with reference to the accompanying drawings.

[0044] see figure 1, in one embodiment of the present invention, a system-in-chip package structure 10 is provided, including a substrate 104, a plurality of chips 101, 102 and a plurality of discrete devices 103 are packaged on the upper surface of the substrate 104, and the substrate 104 The lower surface is provided with a plurality of solder balls 105 . In this embodiment, the chip 101 is packaged on the upper surface of the substrate 104 in the form of flip chip (Flip Chip), and the chip 102 is packaged on the upper surface of the substrate 104 in the form of wire bonding. , the plurality of discrete devices 103 are packaged on the upper surface of the substrate 104 in a surface mount manner. It can be understood that when the system-in-chip package structure 10 is working, the plurality of chips 101 , 102 and the plurality of discrete devices 103 are heat ...

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PUM

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Abstract

Embodiments of the invention provide a chip packaging structure. The chip packaging structure comprises a substrate, a plurality of chips and a plurality of separation devices which are packaged on the upper surface of the substrate, and a heat dissipation apparatus, wherein the heat dissipation apparatus comprises an insulating layer and a heat conduction layer which are arranged in a laminating manner; and the insulating layer fully coats and is attached to the outer surfaces of the multiple chips and separation devices and the upper surface of the substrate, and is used for transferring heat generated by the multiple chips and separation devices to the heat conduction layer and the substrate, so as to dissipate the heat generated by the multiple chips and separation devices through the heat conduction layer and the substrate. In addition, the embodiments of the invention also provide a manufacturing method for the chip packaging structure. The chip packaging structure, by setting the heat dissipation apparatus, can realize uniform and efficient system-level chip packaging heat dissipation.

Description

technical field [0001] The invention relates to the technical field of chip packaging, in particular to a chip packaging structure and a manufacturing method thereof. Background technique [0002] With the continuous decline of chip process nodes, the integration level of chips continues to rise. Small size, high speed, and high performance have become the development trend of electronic devices. The number of transistors per unit area in a chip is increasing, and the power density is also increasing. The thermal management of the chip is becoming more and more challenging. In a System-in-Package (SiP) structure, multiple heterogeneous chips and discrete devices are packaged and integrated into a small-sized system. Because different chips have different power consumption under different working conditions, the system-in-package structure is prone to problems such as heat accumulation and uneven heat dissipation. At present, the common technology to improve the heat dissi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/367H01L23/373H01L21/50
CPCH01L21/50H01L23/367H01L23/3733H01L23/3735H01L2924/181H01L23/3135H01L23/373H01L25/0655H01L25/50H01L2224/16225H01L2924/15311H01L2924/00014H01L2224/48227H01L2224/32225H01L2924/00012H01L2224/45099H01L23/485H01L23/49816H01L21/78H01L21/4853H01L21/4871H01L23/538H01L24/16H01L24/48H01L2224/48225H01L2924/19105
Inventor 符会利蔡树杰胡骁
Owner HUAWEI TECH CO LTD
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