Word line decoding circuit and memory

A word line decoding and circuit technology, applied in the field of word line decoding circuit and memory, can solve the problem that it is difficult to balance the power consumption and decoding accuracy of the word line decoding circuit

Active Publication Date: 2019-04-16
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, while making the above improvements, it is difficult to balance the power consumption and decoding accuracy of the word line decoding circuit in the prior art

Method used

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  • Word line decoding circuit and memory
  • Word line decoding circuit and memory

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Embodiment Construction

[0025] As mentioned in the background technology section, in the prior art, in order to reduce the voltage drop borne by the MOS transistor in the word line decoding circuit, one of the power supply voltages of the word line decoding circuit is set to a power supply voltage higher than the ground voltage, to replace the ground voltage. However, while making the above improvements, it is difficult to balance the power consumption and decoding accuracy of the word line decoding circuit in the prior art.

[0026] The inventor of the present application analyzed a word line decoding circuit. Such as figure 1 As shown, a word line decoding circuit 100 may include: a voltage detection circuit 101 , a bias voltage generation circuit 102 , a decoding circuit 103 and a selection circuit 104 .

[0027]In order to reduce the voltage difference suffered by the MOS transistors in the decoding circuit 103 and the selection circuit 104 , the word line decoding circuit 100 is provided with ...

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Abstract

The invention relates to a word line decoding circuit and a memorizer. The word line decoding circuit comprises a voltage detection circuit, a decoding bias voltage generation circuit, a word line bias voltage generation circuit, a decoding circuit and a selection circuit, wherein the voltage detection circuit is suitable for comparing erasing voltage with a threshold to output detection voltage; the decoding bias voltage generation circuit is suitable for generating decoding bias voltage according to the detection voltage; the word line bias voltage generation circuit is suitable for generating a word line bias voltage according to the detection voltage; when the erasing voltage is greater than or equal to the threshold, the decoding bias voltage and the word line bias voltage are increased to first supply voltage; when the erasing voltage is less than the threshold, the decode bias voltage and the word line bias voltage are decreased to ground wire voltage; the first supply voltage is greater than the ground wire voltage; the decoding circuit is suitable for receiving the erasing voltage and the decoding bias voltage and decoding a data signal to output a decoding result; the selection circuit is suitable for selecting one from the erasing voltage and the word line bias voltage as a word line signal according to the decoding result. According to the circuit and the memorizer, the decoding accuracy is ensured, and at the same time, the power consumption is reduced.

Description

technical field [0001] The invention relates to the field of memory design, in particular to a word line decoding circuit and memory. Background technique [0002] Memory (Memory) is a memory device in a computer system used to store programs and data. Generally speaking, memory can be divided into random access memory (Random Access Memory, RAM), read-only memory (Read-Only Memory, ROM) and hybrid memory that can be read and written at will and can keep the data in the device unchanged after power off . Wherein, hybrid memory may include such as Electrically Erasable Programmable Read-Only Memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), Non-Volatile Random Access Memory (Non-Volatile Random Access Memory, NVRAM) and flash memory (Flash), etc. . Flash is widely used due to its fast erasing characteristics. [0003] Reading, writing, and erasing of memory are the most common memory operations. When performing an erase operation on a memory, it is ne...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C8/10G11C8/08G11C16/08
CPCG11C8/08G11C8/10G11C16/08
Inventor 胡剑
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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