A reading method and flash memory device

Abstract

The invention discloses a reading method and a flash memory device. The reading method is applied to the flash memory device comprising a nonvolatile semiconductor memory unit array. The method comprises the steps of judging whether to read all memory units of the nonvolatile semiconductor memory unit array, if yes, applying voltage to corresponding word lines of all memory units to perform a first sensing operation; and after the first sensing operation, performing a second sensing operation on the memory unit determined to be in a closed state, wherein a difference between the voltage applied to the word lines during the first sensing operation and the voltage applied to the work lines during the second sensing operation is within a preset range, and sensing time corresponding to the second sensing operation is not less than that corresponding to the first sensing operation. According to the technical scheme of the method and the device provided by the invention, the flash memory device can be read via the two sensing operations, and thus noise of a common source line is reduced, and accuracy of the reading operation is ensured.

Description

technical field [0001] The present invention relates to the technical field of memory, and more specifically, to a reading method and a flash memory device. Background technique [0002] As a non-volatile memory, NAND flash memory has become an important key component of a large-capacity memory device due to its high integration. However, because of the NAND flash memory, the ground terminals of all the memory cells that make up the non-volatile memory cell array are finally connected together through the common source line, so with the expansion of the memory cell array, the full bit line read method is adopted. When a read operation is performed, the noise of the common source line becomes more and more influential, and even causes errors in the read operation. Therefore, it is particularly important to reduce the noise of the common source line when the read operation is performed. Contents of the invention [0003] In view of this, the present invention provides a rea...

AI Technical Summary

Problems solved by technology

However, because of the NAND flash memory, the ground terminals of all the memory cells that make up the non-volatile memory cell array are finally connected together through the common source line, so with the expansion of the memory cell array, the full bit line read method is adopted. When performing a read operation, the influence of the common source line noise becomes greater and greater, and even causes errors in the read operation. Therefore, it is particularly important to reduce the noise of the common source line during the read operation.

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