4results about How to "Small conduction current" patented technology

The invention provides a double-channel planar gate silicon carbide LDMOS and a preparation method thereof. The preparation method comprises the following steps: forming a barrier layer on a silicon carbide substrate, and performing etching and ion implantation to form a first channel region and a first N-type source region; a barrier layer is formed again, etching and ion implantation are carried out, and an isolation region is formed; a barrier layer is formed again, etching and ion implantation are carried out, and a second channel region is formed; a barrier layer is formed again, etching and ion implantation are carried out, and a P-type well region is formed; a barrier layer is formed again, etching and ion implantation are carried out, and a second N-type source region is formed; forming a barrier layer again, etching and depositing metal, and forming a body diode metal layer; a barrier layer is formed again, and a gate dielectric layer is formed through etching and deposition; forming a barrier layer again, etching and depositing metal, and forming a gate metal layer; re-forming a barrier layer, etching, depositing metal, respectively forming a source metal layer and a drain metal layer, and removing the barrier layer to complete preparation; and a double-channel structure design is adopted, so that the on-resistance of the device is reduced.

The present invention discloses a method and system for displaying a high refresh rate at low grayscale of an LED. It is a display method based on PWM to improve the refresh rate of an LED screen, and belongs to the field of LED display technology. In order to solve the problems of insufficient refresh rate of the LED screen and display effect at low grayscale, the prior art breaks up the display cycle and distributes the lighting cycle as evenly as possible in one frame. However, when the grayscale is high, the original PWM pulse width is wide enough to allocate partial pulses to each broken up group; when the grayscale is low, the original PWM pulse width is short, which is not enough to allocate pulses to each broken up group. The present invention does not change the clock frequency and the total brightness, but reduces the on-current of the LED to the original #imgabs0# and increases the number of pulses to the original 2. P times, that is, the total pulse width becomes twice the previous P times, accordingly, when the LED screen displays in low grayscale, the pulse width can be fully dispersed and increased, ultimately improving the display refresh rate of the LED screen at low grayscale levels.

The embodiment of the invention discloses a gate driving circuit, a driving method, a display panel and a display device, and the circuit comprises a pull-up node control circuit which controls the potential of a pull-up node; the pull-down node control circuit is used for controlling the potential of a pull-down node under the control of the pull-up node voltage signal, the control voltage signal and the fixed voltage signal; a first electrode of a pull-down node control transistor in the pull-down node control circuit is electrically connected with a pull-down node; a control voltage signal received by the grid electrode of the pull-down node control transistor is smaller than a fixed voltage signal received by the drain electrode, or the fixed voltage signal received by the grid electrode of the pull-down node control transistor is smaller than the control voltage signal received by the drain electrode; and the gate drive output circuit is used for controlling a gate drive signal output end to output a gate drive signal under the control of the pull-up node voltage signal and the pull-down node voltage signal. According to the embodiment of the invention, the transistor size in the pull-down node control circuit can be reduced, and the occupied area of the whole gate driving unit is reduced.

The application provides a signal transmission system, an electronic control unit and a short-circuit protection circuit of an interface driving circuit, relates to the technical field of electronic circuits, and the delay unit and the current limiting unit in the circuit are connected with the interface driving circuit; the interface driving circuit at least comprises a first switch tube, the current limiting unit is used for limiting the conduction current of the first switch tube within a first time, and the delay unit is used for controlling the duration of the first time; the starting point of the first time is the time point when the first switch tube is driven, the conduction current of the first switch tube within the first time is greater than the conduction current within other times, a higher current can be passed within the first time when the first switch tube is opened, the fast level conversion is completed to realize driving, and the conduction current of the first switch tube within other times is reduced; thus, even if a short circuit occurs, the thermal damage of a large current to an electrical appliance can be avoided, so that the short-circuit protection of the interface driving circuit is realized.