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Devices and methods for localized underfill

一种底充胶、局部化的技术，应用在半导体器件、电固体器件、半导体/固态器件制造等方向

Active Publication Date: 2019-12-17
INVENSAS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

While underfill can simplify some of the issues associated with device fabrication, it can introduce others

Method used

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  • Devices and methods for localized underfill
  • Devices and methods for localized underfill
  • Devices and methods for localized underfill

Examples

Experimental program
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Embodiment Construction

[0018] In the following description, specific details are set forth, describing some embodiments consistent with the present disclosure. It will be apparent, however, to one skilled in the art that some embodiments may be practiced without some or all of these specific details. The specific embodiments disclosed herein are intended to be illustrative rather than restrictive. Those skilled in the art may recognize other elements, although not specifically described herein, within the scope and spirit of the present disclosure. Furthermore, to avoid unnecessary repetition, one or more features shown and described in connection with one embodiment may be incorporated into other embodiments unless specifically stated otherwise or the feature or features would render that embodiment ineffective.

[0019] figure 1 is a simplified diagram of a multi-die package 100 according to some embodiments. Such as figure 1 As shown, package 100 includes substrate 110 . Substrate 110 repres...

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Abstract

The present invention provides a device and method for localized underfill comprising a substrate, a plurality of dies, and an underfill material. The substrate includes a plurality of contacts separated by a plurality of mesas and a plurality of cavities. The plurality of dies are mounted to the substrate using the plurality of contacts. The underfill material is located between the substrate and the die. The underfill material is localized into regions using the mesas. Each of the contacts is located in a respective one of the cavities. In some embodiments, the substrate further includes a plurality of channels interconnecting the cavities. In some embodiments, the substrate further includes a plurality of mesas within the cavity for further localizing the underfill material. In some embodiments, the outer edge of the first one of the dies rests on the edge of the first one of the cavities.

Description

technical field [0001] The present disclosure relates generally to the packaging of integrated circuit devices, and more particularly to partial underfill. Background technique [0002] Semiconductor devices, such as memory devices, processors, application-specific integrated circuits (ASICs), and other chips are typically fabricated in multi-step processes. A large number of devices are initially fabricated on large substrates such as wafers. The substrate typically includes at least one layer of semiconductor material, such as silicon, gallium arsenide, or the like. Using various photolithography, deposition, etching, and / or other semiconductor processes, one or more layers of semiconductors, metals, dielectrics, etc. are patterned on the substrate to form various devices, interconnects, etc. Multiple semiconductor circuits are typically fabricated on each substrate, where the substrate is sliced ​​or diced into individual dies, each of which has one or more circuits for...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/13H01L25/065H01L21/56H01L23/498
CPCH01L21/563H01L23/13H01L25/0655H01L25/50H01L23/49827H01L2224/131H01L2224/16227H01L2224/26175H01L2224/32225H01L2224/73204H01L2224/92125H01L2924/15156H01L2924/15153H01L2924/014H01L2224/16225H01L2924/00H01L21/4853H01L21/52H01L21/54H01L23/3157H01L23/3178H01L23/49811H01L23/49838H01L2225/06517H01L2225/06555H01L2225/06593
Inventor 王亮R·坎卡尔C·G·沃伊奇克C·E·尤佐
Owner INVENSAS CORP