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Decoding method, memory control circuit unit, and memory storage device

A decoding method and storage unit technology, applied in static memory, instrument, electrical digital data processing, etc., can solve problems such as upper limit of correction ability and decline of correction ability

Active Publication Date: 2020-05-26
PHISON ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the correction capability of sub-ECCs has its upper limit
If mis-correction occurs when decoding the sub-data unit according to the sub-ERC code, the overall correction capability will be reduced

Method used

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  • Decoding method, memory control circuit unit, and memory storage device
  • Decoding method, memory control circuit unit, and memory storage device
  • Decoding method, memory control circuit unit, and memory storage device

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Embodiment Construction

[0115] Generally speaking, a memory storage device (also called a memory storage system) includes a rewritable non-volatile memory module and a controller (also called a control circuit unit). Typically memory storage devices are used with a host system such that the host system can write data to or read data from the memory storage device.

[0116] figure 1 is a schematic diagram of a host system, a memory storage device, and an input / output (I / O) device according to an exemplary embodiment, and figure 2 It is a schematic diagram showing a host system, a memory storage device and an input / output (I / O) device according to another exemplary embodiment.

[0117] Please refer to figure 1 and figure 2 , the host system 11 generally includes a processor 111 , a random access memory (random access memory, RAM) 112 , a read only memory (read only memory, ROM) 113 and a data transmission interface 114 . The processor 111 , the RAM 112 , the ROM 113 and the data transmission inte...

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Abstract

The invention provides a decoding method, a memory control circuit unit and a memory storage apparatus. The method comprises the steps of reading data from a storage unit of a rewritable nonvolatile memory module according to a first voltage, wherein the data comprises a user data string and an error checking and correction code group. The method also comprises the steps of decoding at least partial sub-data units in the user data string according to a first decoding algorithm to obtain decoded sub-data units. The method further comprises the steps of reverting the values of corrected bits to original bit values if the corrected bits in the decoded sub-data units meet a reliability condition. Based on the method, the overall data correction capability can be improved and the decoding efficiency can be enhanced.

Description

technical field [0001] The present invention relates to a decoding method, and in particular to a data decoding method for a rewritable non-volatile memory module, a memory control circuit unit and a memory storage device. Background technique [0002] Digital cameras, mobile phones, and MP3 players have grown rapidly in recent years, making consumers' demand for storage media also increase rapidly. Since the rewritable non-volatile memory module (for example, fast memory) has the characteristics of non-volatility of data, power saving, small size, and no mechanical structure, it is very suitable for being built in various portable multimedia devices as mentioned above. . [0003] Generally, the data written to the rewritable non-volatile memory module will be encoded according to an error correction code, and the data read from the rewritable non-volatile memory module will also be decoded by the corresponding program . For example, if the turbo code algorithm is used to...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/10G11C29/42
CPCG06F11/1012G06F11/1068G11C29/42
Inventor 林纬王天庆赖国欣
Owner PHISON ELECTRONICS