A batch circuit simulation method and system

Abstract

The present invention provides a batch circuit simulation method and system. The method comprises: dividing a simulation process of test cases to be simulated into multiple simulation stages; grouping the test cases with the same simulation stage sequentially based on an execution sequence of simulation stages, the same simulation stage being the simulation stage having the same simulation operations and a consistent simulation operation execution sequence; and carrying out uniform simulation for the same simulation stage of the test cases in the same group based on the execution sequence of each simulation stage during the simulation process, and simulating the subsequent simulation stage of each test case in the group on the basis of the simulation result. According to the present invention, by extracting the same simulation stage of test cases, grouping the test cases, and sharing the simulation intermediate result in the group with the same simulation stage, the total time consumed by simulation is reduced, the batch circuit simulation speed is increased greatly, and the simulation efficiency is improved.

Description

technical field [0001] The invention relates to the technical field of circuit design simulation, in particular to a batch circuit simulation method and system. Background technique [0002] In the early development process of chip design, in order to ensure the normal operation of the chip, detailed circuit simulation must be carried out. The simulation speed is one of the key factors that determine whether the simulation task can be completed on time. With the rapid growth of the chip scale, the scale of the circuit simulation is also getting larger and larger. Correspondingly, the time to complete the simulation process is getting longer and longer, resulting in slower and slower simulation speed. In order to speed up the simulation speed, multiple servers are often used for batch simulation. The current routine of batch circuit simulation is: first compile all the input files of the circuit, generate one or more simulation preparation files, and then perform simulation ...

AI Technical Summary

Problems solved by technology

refer to figure 1 , in the batch simulation method proposed in the prior art, the entire simulation process of each test case must be completely executed, resulting in a long time-consuming and affecting the project progress

[0004] Moreover, due to the limitation of hardware resources, not all test cases in the simulation process can be executed in parallel.

Moreover, for the simulation of large-scale circuits, there are generally hundreds of test cases, and the hardware server resources are limited, and only several simulation processes can be run at the same time. Combining all the above factors, the simulation takes a long time and the speed is slow. Slow, low simulation efficiency

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