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Parallel flash access system and method

A write access and bus technology, applied in the field of data communication, can solve problems such as inconsistent parallel FLASH access, lower access speed, and increased management complexity

Active Publication Date: 2019-11-26
MAIPU COMM TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the different bus width supported by the BOOT program, the operating system and the application program, the access to the parallel FLASH is not uniform, which will increase the complexity of management and reduce the access speed

Method used

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  • Parallel flash access system and method
  • Parallel flash access system and method
  • Parallel flash access system and method

Examples

Experimental program
Comparison scheme
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Embodiment 1

[0026] The embodiment of the present application discloses a parallel FLASH access system. refer to figure 1 As shown in , the system includes: a processor unit 11 , a programmable logic unit 12 and a parallel FLASH storage unit 13 . The processor unit 11 is connected to the programmable logic unit 12 through a local bus 14 , and the programmable logic unit 12 is connected to the parallel FLASH storage unit 13 through a controlled access bus 15 . refer to figure 2 As shown in , the controlled access bus 15 includes a byte configuration (BYTE_CFG) bus 153 .

[0027] The processor unit 11 described in this application may be a processor, and the processor described here may be a central processing unit (Central Processing Unit, CPU), or a specific integrated circuit (Application Specific Integrated Circuit, ASIC), or be One or more integrated circuits configured to implement embodiments of the present application. The programmable logic unit 12 may be a programmable process...

Embodiment 2

[0046] The embodiment of the present application discloses a parallel FLASH access method, which is applied to the above-mentioned system, referring to Figure 4 As shown in , the method includes:

[0047] S101. In an address cycle of bus access, the processor unit sends a read / write access address to the programmable logic unit through the local bus.

[0048] S102. The parallel FLASH storage unit is divided into two or more storage spaces, and the BOOT program space is stored and accessed according to the first bit width; the operating system and application program space are stored and accessed according to the second bit width; when read / write access When the address is located in the storage space of the startup BOOT program, the programmable logic unit configures the bus mode of the parallel FLASH storage unit to the first bit width through the byte configuration bus according to the read / write access address, and configures the BOOT program space with the first bit width...

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Abstract

The application discloses a parallel FLASH accessing system and method, which relates to data communication field and is used for realizing interview and data storage to the FLASH by adopting different bit wide bus. The parallel FLASH accessing system comprises a processor unit, a programmable logic unit and a parallel FLASH storage unit, wherein the processor unit and the programmable logic unit are connected by the local bus, and the programmable logic unit and the parallel FLASH storage unit are connected by the controlled access bus. The application of utility model is used for the parallel FLASH interview and data storage.

Description

technical field [0001] The present application relates to the field of data communication, in particular to a parallel flash memory (FLASH) access system and method. Background technique [0002] In the field of data communication, especially in devices using embedded communication processors, the software running in the system generally includes a boot (BOOT) program, an operating system and application programs. Among them, the BOOT program is generally written into the FLASH chip by a programmer for use when the processor is started. After the processor is started, the operating system and application program are downloaded through the network port and written into the FLASH chip, so that when the device is started next time, the processor can directly read and run the program in the FLASH. [0003] Embedded communication equipment often uses parallel FLASH as the main device for BOOT program, operating system and application program storage. In order to save cost, BOOT...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/16G06F9/4401
CPCG06F9/4401G06F13/1684G06F13/1694
Inventor 王茂松
Owner MAIPU COMM TECH CO LTD