Coder, decoder, coding method and decoding method lowering flash bit error rate

An encoder and bit error rate technology, which is applied in the field of flash memory chip compilation, can solve the problems of not reducing the original bit error rate and the probability of data error in flash memory, etc., so as to improve the decoding success rate, improve reliability, and reduce original The effect of bit error rate

Active Publication Date: 2018-01-16
HUAZHONG UNIV OF SCI & TECH
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Problems solved by technology

[0007] Existing solutions to improve the reliability of flash memory mainly use error correction codes, such as LDPC codes or BCH codes, to cor

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  • Coder, decoder, coding method and decoding method lowering flash bit error rate
  • Coder, decoder, coding method and decoding method lowering flash bit error rate
  • Coder, decoder, coding method and decoding method lowering flash bit error rate

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Embodiment Construction

[0045] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not constitute a conflict with each other.

[0046] like image 3 Shown is an embodiment of the encoder and decoder of the present invention;

[0047] The encoder mainly includes the following parts:

[0048] The encoding write module is used to analyze the write command after accepting the write command, determine whether the physical address of the written data belongs to the high page or the low page, and whether the written data is c...

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Abstract

The invention discloses a coder, a decoder, a coding method and a decoding method lowering flash bit error rate, belonging to the technical field of flash chip compilation. When the coder writes data,the coder determines whether a half of ''1'' are in written hot data, if yes, the coder inverts hot data and then writes in flash; and the coder determines whether a half of ''1'' in high page data or a half of ''0'' in low page data are in written cold data, if yes, the coder inverts the cold data and then writes in flash. When the decoder reads data, the decoder analyzes an inversion state of the read data, if a half of ''1'' exists in the inversion state, the decoder inverts the read data and then outputs, if not, the decoder directly outputs read data. The invention realizes the coding method and decoding method lowering flash bit error rate. Through adoption of the coder, the decoder, the coding method and decoding method, the error probability of data in flash is lowered, the original bit error rate is lowered, more accurate input is provided for existing correction code solutions, the decoding success rate is improved, so that the flash reliability is further improved.

Description

technical field [0001] The invention belongs to the technical field of flash memory chip compilation, and more particularly relates to a coder and decoder and a code and decode method for reducing the bit error rate of flash memory. Background technique [0002] NAND flash memory is a non-volatile storage medium, which has the advantages of small size, high storage density, low power consumption, fast reading and writing, etc. It is suitable for large-capacity storage and has a wide range of applications in the storage field. With the development of technology, the size of NAND flash memory is getting smaller and smaller, and each unit stores more and more data bits. Although this improves the storage density of data, it also makes the reliability and durability of flash memory more and more Low, the bit error rate is getting higher and higher. [0003] There are mainly four types of errors in flash memory: Erase Error, Program Interference Error, Read Error and Retention E...

Claims

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Application Information

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IPC IPC(8): G06F11/10G11C29/42G11C16/34G11C16/08
Inventor 冯丹童薇刘景宁纪少彬刘传奇张扬
Owner HUAZHONG UNIV OF SCI & TECH
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