Power generating device on intelligent identification chip

Abstract

The invention discloses a power generating device on an intelligent identification chip. The power generating device comprises a bias circuit module, an LDO module, a BGR module, a voltage comparisonmodule and a voltage switching module, wherein voltage RFVDD supplies power for the bias circuit module, and the bias circuit module generates reference voltage VREF1; the input end of the LDO moduleis connected to the bias circuit module and used for converting the voltage RFVDD into voltage VDD; the BGR module is connected to the LDO module, the voltage VDD supplies power for the BGR module, and the BGR module generates reference voltage VREF2; the voltage comparison module is used for comparing the reference voltage VREF1 and the reference voltage VREF2 and outputting corresponding high and low level; the voltage switching module is used for selectively outputting corresponding reference voltage according to the corresponding output high and low level and transmitting the correspondingoutput reference voltage into the LDO module. By the power generating device, stable and precise power voltage can be generated under various working conditions, and stable working power can be provided for the chip and other modules.

Description

technical field [0001] The invention belongs to the technical field of power supply circuits in analog integrated circuits, and in particular relates to a power generation device on an intelligent identification chip. Background technique [0002] In the traditional power architecture, power-on failure may occur due to improper power architecture setting, so that the correct power voltage value cannot be generated. Such as figure 1 As shown, after RFVDD is powered on, the power supply voltage VDD is boosted up, so that the BGR works to generate VREF, and then the precise VDD voltage is generated through VREF. Its potential defect is that the opening time of the PM1 tube is not long enough, so that the BGR has not had time to generate a stable VREF voltage, resulting in the inability to generate the desired power supply voltage value. In addition, the VREF value of the two input terminals of the comparator and the resistor divider value There will be certain fluctuations, c...

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Problems solved by technology

Its potential defect is that the opening time of the PM1 tube is not long enough, so that the BGR has not had time to generate a stable VREF voltage, resulting in the inability to generate the desired power supply voltage value. In addition, the VREF value of the two input terminals of the comparator and the resistor divider value There will be certain fluctuations, causing the output of the comparator to turn off the PMOS when the voltage is not stable, which also leads to the inability to obtain a stable power supply voltage value

In short, the traditional power supply architecture cannot fully guarantee that its functions are correct during the power-on process, and its working stability is relatively easy to be affected by the process.

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