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Array substrate and oled display device

An array substrate and display area technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problems affecting the yield of display products, damage to metal lines, damage to display pixel units, etc., to improve the ability to resist ESD in the process. Effect

Active Publication Date: 2020-06-30
WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The invention provides an array substrate, which can release process ESD by improving the film layer structure of the dummy pixel unit, so as to prevent the process ESD from entering the display pixel unit and damaging the metal circuit; It serves the purpose of resisting the ESD of the manufacturing process. In the manufacturing process, the display pixel unit is easily damaged by the static electricity of the manufacturing process, which in turn affects the technical problem of the yield rate of the display product production process.

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  • Array substrate and oled display device
  • Array substrate and oled display device
  • Array substrate and oled display device

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Embodiment Construction

[0066] The following descriptions of the various embodiments refer to the accompanying drawings to illustrate specific embodiments in which the invention may be practiced. The directional terms mentioned in the present invention, such as [top], [bottom], [front], [back], [left], [right], [inside], [outside], [side], etc., are only for reference The orientation of the attached schema. Therefore, the directional terms used are used to illustrate and understand the present invention, but not to limit the present invention. In the figures, structurally similar elements are denoted by the same reference numerals.

[0067] The present invention is aimed at the array substrate of the prior art, and the Dummy Pixel design scheme cannot achieve the purpose of resisting the ESD of the manufacturing process. During the manufacturing process, the display pixel unit is easily damaged by the static electricity of the manufacturing process, which in turn affects the yield rate of the displa...

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Abstract

The present invention provides an array substrate, including a dummy pixel unit; the dummy pixel unit includes: a first polysilicon layer, a first gate insulating layer prepared on the surface of the first polysilicon layer, and a first gate insulating layer prepared on the surface of the first gate insulating layer. The first gate metal; the first inter-insulation layer covering the first gate insulation layer and the first gate metal; and the first source / drain metal prepared on the surface of the first inter-insulation layer; wherein, the first source / drain The pole metal is connected to the first polysilicon layer through the first metal through hole; the beneficial effect is: the array substrate provided by the present invention adds a through hole to the inter insulating layer of the dummy pixel unit, and connects the polysilicon layer of the dummy pixel unit to the source Drain metal connection, the process ESD in the production process enters and releases through the through hole of the inter-insulation layer of the dummy pixel at the beginning and end of a row of scanning lines, avoiding this type of process ESD damage to the Pixel in the AA area, thereby improving the Pixel in the AA area Anti-process ESD capability.

Description

technical field [0001] The invention relates to the field of display technology, in particular to an array substrate and an OLED display device with the array substrate. Background technique [0002] Dummy Pixel (dummy pixel unit) is an important structure in the current panel design scheme, which can ensure the process accuracy of Pixel in AA area (pixel unit in effective display area). Usually the Dummy Pixel (dummy pixel unit) design is to remove the ILD (inter-insulating layer) hole in the Pixel in the AA area and short-circuit the TITO (pixel electrode) layer and the BITO (common electrode) layer to prevent the pixel electrode Floating (floating) . However, it is actually found that the process ESD usually enters through the ILD holes at the beginning and end of a row of Gates (scanning lines) during the production process, causing ESD (process electrostatic) damage. Once this type of process ESD occurs, due to the removal of The ILD hole connecting the Poly (polysili...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/02H01L27/32
CPCH01L27/0248H10K59/1213
Inventor 洪光辉
Owner WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD