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Wafer test protection pad and test method thereof

A technology of wafer testing and testing methods, applied in the direction of single semiconductor device testing, etc., can solve the problems of common power supply DUT failure, short circuit, incomplete die circuit, etc., and achieve the effect of preventing probe short-circuit and needle burning phenomenon.

Active Publication Date: 2018-06-19
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In terms of testing, the difficulty of CP is the production of probe cards and the interference of parallel testing.
[0003] When multiple DUTs are tested at the same time, several DUTs may share the power supply, and the die circuit located in the edge area of ​​the wafer is incomplete, which will cause the probes to be stuck, and may be short-circuited, and at least some DUTs that share the power supply will fail. , serious and even cause current shock damage to the probe itself, so that subsequent tests are affected

Method used

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  • Wafer test protection pad and test method thereof
  • Wafer test protection pad and test method thereof
  • Wafer test protection pad and test method thereof

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Embodiment Construction

[0015] A kind of wafer test protection pad of the present invention is used for wafer probe test CP machine platform, such as figure 1 As shown, the protection pad is ring-shaped, and its outer diameter is larger than the wafer it carries, and the protection pad covers the peripheral area of ​​the wafer.

[0016] The protective pad is made of various materials such as rubber, resin, etc., which are elastic, insulated and resistant to temperature changes, or a combination structure thereof. The upper layer of the material may contain materials such as silicon carbide (SiC) and other abrasive particles, which play a role in protecting the needle tip. Cleansing substances.

[0017] When using the CP machine for testing, the test surface of the wafer is covered with a ring-shaped elastic insulating protection pad, and the protection pad covers a circle of crystal grains on the outer edge of the wafer; The circle of grains along the edge is the grains on the outer circle of the wa...

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Abstract

The invention discloses a wafer test protection pad which is suitable for a wafer probe test machine. The protection pad is annular, and the diameter of the external edge is greater than that of the borne wafer. The protection pad covers the peripheral area of the wafer. The protection pad is made of elastic and insulating material including rubber and plastics. The invention also discloses a usemethod of the wafer test protection pad. The peripheral probe on the probe card directly hits the protection pad without contacting the test point on the wafer when the CP test is performed so as to be cleaned by the elastic protection pad, and probe burning can be effectively prevented by the insulating protection pad.

Description

technical field [0001] The invention relates to the field of manufacturing and testing of semiconductor integrated circuits, in particular to a wafer testing protection pad in wafer testing. Background technique [0002] On the wafer, after the semiconductor device is manufactured and before dicing and packaging, the wafer will be tested. Since it has not been packaged at this time, the device under test (DUT) on the wafer is tested through the probe card. The probe touches the PAD reserved for testing on the wafer surface, and then through the test program, the corresponding test electrical signal is loaded on the probe for testing, and some performances of the die on the entire wafer are obtained. Information, including whether there is a short circuit, whether the function is normal, whether the performance is high or low, etc., is used to screen and bin multiple dies on the wafer. It is called CP test (chip probing). CP test is to pick out bad Dies, which can reduce the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/26
CPCG01R31/26
Inventor 吴苑
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP