Double-FPGA cooperative work method for deep neural network

Abstract

The invention belongs to the field of onboard intelligent computation and provides a double-FPGA cooperative work method for a deep neural network. The method comprises the steps that a deep neural network model is analyzed, according to the characteristic that the deep neural network model is composed of multiple sub layers, a calculation task is divided, and double-FPGA-chip cooperative work isachieved; the method of dividing the calculation task comprises serial division and parallel division. The limit of hardware resources can be effectively broken, time is replaced by space, the parallel degree of the neural network in an embedded calculation environment is greatly increased, and then the calculation speed of the network is increased. Similarly, the method can be further expanded toa multi-FPGA cooperative work method, and the neural network with a larger scale is achieved.

Description

technical field [0001] The invention belongs to the field of airborne intelligent computing, and proposes a double FPGA cooperative working method oriented to a deep neural network. Background technique [0002] Deep neural networks have shown better and better application effects in intelligent computing tasks in many fields, and they also have excellent application prospects in the aviation field. However, the current deep neural network with excellent performance is very large in scale and runs on workstations, supercomputers and even computer clusters. For example, the earliest Google Brain used 1000 16-core CPUs to train the deep neural network to recognize cats, and defeated the world champion last year. AlphaGo uses 1920 CPUs and 280 GPUs, so it is difficult to implement a deep neural network in an embedded environment with limited hardware resources. At present, one solution is based on FPGA's rich programmable logic and wiring resources. However, even if the curren...

AI Technical Summary

Problems solved by technology

[0004] The present invention proposes a dual-FPGA cooperative working method for deep neural networks. By evaluating the computational complexity of each computing unit of the deep neural network, the network model is divided to realize the cooperative work of dual FPGA chips to solve the hardware resources of a single FPGA chip. Limited problems, better use of the parallel computing characteristics of the deep neural network, improve the computing speed, so as to be better applied to the airborne embedded environment with high real-time requirements

Images