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Laterally Diffused Metal Oxide Semiconductor Field Effect Transistor

A technology of oxide semiconductors and field effect transistors, applied in semiconductor devices, electrical components, circuits, etc., can solve problems that affect product performance

Active Publication Date: 2020-12-15
CSMC TECH FAB2 CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] In the conventional ultra-high voltage laterally diffused metal oxide semiconductor field effect transistor (LDMOS) device, the single reduced surface electric field (Single Resurf), double reduced surface electric field (Double Resurf), triple reduced surface electric field (Triple Resurf) and When Multi Resurf LDMOS devices work at high temperatures, electron-hole pairs will be generated due to lattice scattering and collisions, resulting in leakage current being collected by the substrate, resulting in crosstalk between LDMOS and control logic, affecting its products performance

Method used

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  • Laterally Diffused Metal Oxide Semiconductor Field Effect Transistor
  • Laterally Diffused Metal Oxide Semiconductor Field Effect Transistor
  • Laterally Diffused Metal Oxide Semiconductor Field Effect Transistor

Examples

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Effect test

Embodiment 1

[0027] figure 1 It is a schematic diagram of the structure of the laterally diffused metal-oxide-semiconductor field effect transistor of Embodiment 1, including a substrate 101 of the second conductivity type, a drift region 102 of the first conductivity type on the substrate 101, and a second conductivity type on the substrate 101. type channel region 103, the drain region 110 of the first conductivity type on the surface of the drift region 102, and the source region on the surface of the channel region 103 (in this embodiment, the first conductivity type doped region 111 and the second conductivity type doped region 111 and the second conductivity type doped region 112 ), the first field oxygen layer 104 between the drain region 110 and the source region, and the second field oxygen layer 104 a located on the side of the channel region 103 away from the drain region 110 . It should be noted that the side of the channel region 103 that is far away from the drain region 110 ...

Embodiment 2

[0034] figure 2 It is a schematic diagram of the structure of the laterally diffused metal-oxide-semiconductor field effect transistor of Embodiment 2. The main difference between it and Embodiment 1 is that, except for the channel region 103 located between the first field oxygen layer 104 and the second field oxygen layer 104a Outside (the source region is disposed in the channel region 103 ), a channel region 103 a is also disposed under the first field oxide layer 104 and in the drift region 102 . Setting the channel region 103 a can assist the depletion of the drift region 102 , thereby increasing the concentration of N-type impurities in the drift region 102 and reducing the on-resistance of the device.

[0035] In this embodiment, the channel region 103 and the channel region 103a are formed in the same step, so as to save the manufacturing process and the number of photolithography plates.

Embodiment 3

[0037] image 3 It is a schematic structural diagram of a laterally diffused metal-oxide-semiconductor field effect transistor in Embodiment 3. The main difference between it and Embodiment 2 is that the channel region 103a is a plurality of discrete structures. Since the closer to the source region, the greater the need for depletion of the auxiliary drift region 102, in other words, the closer to the drain region 110, the lower the need for depletion of the auxiliary drift region 102, so the channel region 103a does not need to be depleted as A strip is provided as in Example 2, but a structure in which the doping concentration (ie, the concentration of P-type impurities) gradually decreases from the source region to the drain region 110 can be provided as the corresponding channel region. Considering the implementation difficulty in manufacturing, the channel region 103 a of the discrete structure can be set so that the closer to the source region, the denser the discrete s...

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Abstract

Provided is a laterally diffused metal-oxide semiconductor field-effect transistor, comprising a second conductivity type substrate (101), a first conductivity type drift region (102) on the substrate (101), a second conductivity type channel region (103) on the substrate (101), a first conductivity type drain region (110) of a surface of the drift region (102), a source region of a surface of the channel region (103), a first field oxide layer (104) between the drain region (110) and the source region and a second field oxide layer (104a) located on a side of the channel region (103) away from the drain region (110), the laterally diffused metal-oxide semiconductor field-effect transistor further being provided with an isolation groove (108) penetrating from the second field oxide layer (104a) downwards to the substrate (101), wherein the electric conductivity of a filler in the isolation groove (108) is lower than the electric conductivity of the substrate (101), the drain region (102) and the channel region (103).

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a lateral diffusion metal oxide semiconductor field effect transistor. Background technique [0002] In the conventional ultra-high voltage laterally diffused metal oxide semiconductor field effect transistor (LDMOS) device, the single reduced surface electric field (Single Resurf), double reduced surface electric field (Double Resurf), triple reduced surface electric field (Triple Resurf) and When Multi Resurf LDMOS devices work at high temperatures, electron-hole pairs will be generated due to lattice scattering and collisions, resulting in leakage current being collected by the substrate, resulting in crosstalk between LDMOS and control logic, affecting its products performance. Contents of the invention [0003] Based on this, it is necessary to improve a laterally diffused metal oxide semiconductor field effect transistor that can reduce the crosstalk of the lea...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/06H01L29/78
CPCH01L29/0607H01L29/7816H01L29/0634H01L29/42368
Inventor 张广胜张森胡小龙吴肖
Owner CSMC TECH FAB2 CO LTD